hanshu.fit.eqn

用FPGA做的DDS函数信号发生器

MC1L47 = MC1L46;


--MB1L24 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[598]~43061 at LCCOMB_X17_Y5_N6
MB1L24 = MC1L47 & (MC1L45) # !MC1L47 & GB1L47;


--MB1L23 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[597]~43062 at LCCOMB_X14_Y3_N18
MB1L23 = MC1L47 & (MC1L43) # !MC1L47 & GB1L45;


--MB1L22 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[596]~43063 at LCCOMB_X14_Y3_N28
MB1L22 = MC1L47 & (MC1L41) # !MC1L47 & GB1L43;


--MB1L21 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[595]~43064 at LCCOMB_X17_Y5_N2
MB1L21 = MC1L47 & MC1L39 # !MC1L47 & (GB1L41);


--MB1L20 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[594]~43065 at LCCOMB_X17_Y4_N30
MB1L20 = MC1L47 & (MC1L37) # !MC1L47 & GB1L39;


--MB1L19 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[593]~43066 at LCCOMB_X14_Y3_N12
MB1L19 = MC1L47 & (MC1L35) # !MC1L47 & GB1L37;


--MB1L18 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[592]~43067 at LCCOMB_X15_Y5_N26
MB1L18 = MC1L47 & (MC1L33) # !MC1L47 & GB1L35;


--MB1L17 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[591]~43068 at LCCOMB_X14_Y3_N30
MB1L17 = MC1L47 & (MC1L31) # !MC1L47 & GB1L33;


--MB1L16 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[590]~43069 at LCCOMB_X14_Y3_N14
MB1L16 = MC1L47 & (MC1L29) # !MC1L47 & GB1L31;


--MB1L15 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[589]~43070 at LCCOMB_X10_Y5_N14
MB1L15 = MC1L47 & (MC1L27) # !MC1L47 & GB1L29;


--MB1L14 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[588]~43071 at LCCOMB_X10_Y4_N26
MB1L14 = MC1L47 & MC1L25 # !MC1L47 & (GB1L27);


--MB1L13 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[587]~43072 at LCCOMB_X12_Y5_N20
MB1L13 = MC1L47 & MC1L23 # !MC1L47 & (GB1L25);


--MB1L12 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[586]~43073 at LCCOMB_X15_Y4_N0
MB1L12 = MC1L47 & (MC1L21) # !MC1L47 & GB1L23;


--MB1L11 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[585]~43074 at LCCOMB_X10_Y8_N30
MB1L11 = MC1L47 & MC1L19 # !MC1L47 & (GB1L21);


--MB1L10 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[584]~43075 at LCCOMB_X13_Y6_N26
MB1L10 = MC1L47 & (MC1L17) # !MC1L47 & GB1L19;


--MB1L9 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[583]~43076 at LCCOMB_X15_Y4_N6
MB1L9 = MC1L47 & MC1L15 # !MC1L47 & (GB1L17);


--MB1L8 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[582]~43077 at LCCOMB_X15_Y7_N14
MB1L8 = MC1L47 & (MC1L13) # !MC1L47 & GB1L15;


--MB1L7 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[581]~43078 at LCCOMB_X10_Y4_N24
MB1L7 = MC1L47 & MC1L11 # !MC1L47 & (GB1L13);


--MB1L6 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[580]~43079 at LCCOMB_X12_Y8_N30
MB1L6 = MC1L47 & (MC1L9) # !MC1L47 & GB1L11;


--MB1L5 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[579]~43080 at LCCOMB_X14_Y3_N22
MB1L5 = MC1L47 & (MC1L7) # !MC1L47 & GB1L9;


--MB1L4 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[578]~43081 at LCCOMB_X15_Y4_N4
MB1L4 = MC1L47 & (MC1L5) # !MC1L47 & GB1L7;


--MB1L3 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[577]~43082 at LCCOMB_X15_Y4_N2
MB1L3 = MC1L47 & MC1L3 # !MC1L47 & (GB1L5);


--MB1L2 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[576]~43083 at LCCOMB_X17_Y5_N4
MB1L2 = MC1L47 & MC1L1 # !MC1L47 & (GB1L3);


--MB1L1 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[575]~43084 at LCCOMB_X12_Y5_N16
MB1L1 = MC1L47 $ GB1L1;


--NC1L1 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~613 at LCCOMB_X15_Y4_N8
NC1L1 = FB1_w26w[17] & (MB1L1 $ VCC) # !FB1_w26w[17] & MB1L1 & VCC;

--NC1L2 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~614 at LCCOMB_X15_Y4_N8
NC1L2 = CARRY(FB1_w26w[17] & MB1L1);


--NC1L3 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~615 at LCCOMB_X15_Y4_N10
NC1L3 = MB1L2 & !NC1L2 # !MB1L2 & (NC1L2 # GND);

--NC1L4 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~616 at LCCOMB_X15_Y4_N10
NC1L4 = CARRY(!NC1L2 # !MB1L2);


--NC1L5 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~617 at LCCOMB_X15_Y4_N12
NC1L5 = MB1L3 & (NC1L4 $ GND) # !MB1L3 & !NC1L4 & VCC;

--NC1L6 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~618 at LCCOMB_X15_Y4_N12
NC1L6 = CARRY(MB1L3 & !NC1L4);


--NC1L7 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~619 at LCCOMB_X15_Y4_N14
NC1L7 = MB1L4 & !NC1L6 # !MB1L4 & (NC1L6 # GND);

--NC1L8 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~620 at LCCOMB_X15_Y4_N14
NC1L8 = CARRY(!NC1L6 # !MB1L4);


--NC1L9 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~621 at LCCOMB_X15_Y4_N16
NC1L9 = MB1L5 & (NC1L8 $ GND) # !MB1L5 & !NC1L8 & VCC;

--NC1L10 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~622 at LCCOMB_X15_Y4_N16
NC1L10 = CARRY(MB1L5 & !NC1L8);


--NC1L11 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~623 at LCCOMB_X15_Y4_N18
NC1L11 = MB1L6 & !NC1L10 # !MB1L6 & (NC1L10 # GND);

--NC1L12 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~624 at LCCOMB_X15_Y4_N18
NC1L12 = CARRY(!NC1L10 # !MB1L6);


--NC1L13 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~625 at LCCOMB_X15_Y4_N20
NC1L13 = MB1L7 & (NC1L12 $ GND) # !MB1L7 & !NC1L12 & VCC;

--NC1L14 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~626 at LCCOMB_X15_Y4_N20
NC1L14 = CARRY(MB1L7 & !NC1L12);


--NC1L15 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~627 at LCCOMB_X15_Y4_N22
NC1L15 = MB1L8 & !NC1L14 # !MB1L8 & (NC1L14 # GND);

--NC1L16 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~628 at LCCOMB_X15_Y4_N22
NC1L16 = CARRY(!NC1L14 # !MB1L8);


--NC1L17 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~629 at LCCOMB_X15_Y4_N24
NC1L17 = MB1L9 & (NC1L16 $ GND) # !MB1L9 & !NC1L16 & VCC;

--NC1L18 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~630 at LCCOMB_X15_Y4_N24
NC1L18 = CARRY(MB1L9 & !NC1L16);


--NC1L19 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~631 at LCCOMB_X15_Y4_N26
NC1L19 = MB1L10 & !NC1L18 # !MB1L10 & (NC1L18 # GND);

--NC1L20 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~632 at LCCOMB_X15_Y4_N26
NC1L20 = CARRY(!NC1L18 # !MB1L10);


--NC1L21 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~633 at LCCOMB_X15_Y4_N28
NC1L21 = MB1L11 & (NC1L20 $ GND) # !MB1L11 & !NC1L20 & VCC;

--NC1L22 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~634 at LCCOMB_X15_Y4_N28
NC1L22 = CARRY(MB1L11 & !NC1L20);


--NC1L23 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~635 at LCCOMB_X15_Y4_N30
NC1L23 = MB1L12 & !NC1L22 # !MB1L12 & (NC1L22 # GND);

--NC1L24 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~636 at LCCOMB_X15_Y4_N30
NC1L24 = CARRY(!NC1L22 # !MB1L12);


--NC1L25 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~637 at LCCOMB_X15_Y3_N0
NC1L25 = MB1L13 & (NC1L24 $ GND) # !MB1L13 & !NC1L24 & VCC;

--NC1L26 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~638 at LCCOMB_X15_Y3_N0
NC1L26 = CARRY(MB1L13 & !NC1L24);


--NC1L27 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~639 at LCCOMB_X15_Y3_N2
NC1L27 = MB1L14 & !NC1L26 # !MB1L14 & (NC1L26 # GND);

--NC1L28 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~640 at LCCOMB_X15_Y3_N2
NC1L28 = CARRY(!NC1L26 # !MB1L14);


--NC1L29 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~641 at LCCOMB_X15_Y3_N4
NC1L29 = MB1L15 & (NC1L28 $ GND) # !MB1L15 & !NC1L28 & VCC;

--NC1L30 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~642 at LCCOMB_X15_Y3_N4
NC1L30 = CARRY(MB1L15 & !NC1L28);