hanshu.fit.eqn

用FPGA做的DDS函数信号发生器

--FB1_w26w[10] is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|w26w[10] at DSPOUT_X16_Y7_N2
FB1_w26w[10] = FB1L11;

--FB1_w26w[11] is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|w26w[11] at DSPOUT_X16_Y7_N2
FB1_w26w[11] = FB1L12;

--FB1_w26w[12] is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|w26w[12] at DSPOUT_X16_Y7_N2
FB1_w26w[12] = FB1L13;

--FB1_w26w[13] is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|w26w[13] at DSPOUT_X16_Y7_N2
FB1_w26w[13] = FB1L14;

--FB1_w26w[14] is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|w26w[14] at DSPOUT_X16_Y7_N2
FB1_w26w[14] = FB1L15;

--FB1_w26w[15] is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|w26w[15] at DSPOUT_X16_Y7_N2
FB1_w26w[15] = FB1L16;

--FB1_w26w[16] is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|w26w[16] at DSPOUT_X16_Y7_N2
FB1_w26w[16] = FB1L17;

--FB1_w26w[17] is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|w26w[17] at DSPOUT_X16_Y7_N2
FB1_w26w[17] = FB1L18;

--FB1L74 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|mac_out2~DATAOUT18 at DSPOUT_X16_Y7_N2
FB1L74 = FB1L19;

--FB1L75 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|mac_out2~DATAOUT19 at DSPOUT_X16_Y7_N2
FB1L75 = FB1L20;

--FB1L76 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|mac_out2~DATAOUT20 at DSPOUT_X16_Y7_N2
FB1L76 = FB1L21;

--FB1L77 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|mac_out2~DATAOUT21 at DSPOUT_X16_Y7_N2
FB1L77 = FB1L22;

--FB1L78 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|mac_out2~DATAOUT22 at DSPOUT_X16_Y7_N2
FB1L78 = FB1L23;

--FB1L79 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|mac_out2~DATAOUT23 at DSPOUT_X16_Y7_N2
FB1L79 = FB1L24;

--FB1L80 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|mac_out2~DATAOUT24 at DSPOUT_X16_Y7_N2
FB1L80 = FB1L25;

--FB1L81 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|mac_out2~DATAOUT25 at DSPOUT_X16_Y7_N2
FB1L81 = FB1L26;

--FB1L82 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|mac_out2~DATAOUT26 at DSPOUT_X16_Y7_N2
FB1L82 = FB1L27;

--FB1L83 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|mac_out2~DATAOUT27 at DSPOUT_X16_Y7_N2
FB1L83 = FB1L28;

--FB1L84 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|mac_out2~DATAOUT28 at DSPOUT_X16_Y7_N2
FB1L84 = FB1L29;

--FB1L85 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|mac_out2~DATAOUT29 at DSPOUT_X16_Y7_N2
FB1L85 = FB1L30;

--FB1L86 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|mac_out2~DATAOUT30 at DSPOUT_X16_Y7_N2
FB1L86 = FB1L31;

--FB1L87 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|mac_out2~DATAOUT31 at DSPOUT_X16_Y7_N2
FB1L87 = FB1L32;

--FB1L88 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|mac_out2~DATAOUT32 at DSPOUT_X16_Y7_N2
FB1L88 = FB1L33;

--FB1L89 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|mac_out2~DATAOUT33 at DSPOUT_X16_Y7_N2
FB1L89 = FB1L34;

--FB1L90 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|mac_out2~DATAOUT34 at DSPOUT_X16_Y7_N2
FB1L90 = FB1L35;

--FB1L91 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|mac_out2~DATAOUT35 at DSPOUT_X16_Y7_N2
FB1L91 = FB1L36;


--GB1L1 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~624 at LCCOMB_X15_Y6_N8
GB1L1 = FB1L74 & (FB1_mac_out4 $ VCC) # !FB1L74 & FB1_mac_out4 & VCC;

--GB1L2 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~625 at LCCOMB_X15_Y6_N8
GB1L2 = CARRY(FB1L74 & FB1_mac_out4);


--GB1L3 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~626 at LCCOMB_X15_Y6_N10
GB1L3 = FB1L75 & (FB1L105 & GB1L2 & VCC # !FB1L105 & !GB1L2) # !FB1L75 & (FB1L105 & !GB1L2 # !FB1L105 & (GB1L2 # GND));

--GB1L4 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~627 at LCCOMB_X15_Y6_N10
GB1L4 = CARRY(FB1L75 & !FB1L105 & !GB1L2 # !FB1L75 & (!GB1L2 # !FB1L105));


--GB1L5 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~628 at LCCOMB_X15_Y6_N12
GB1L5 = (FB1L106 $ FB1L76 $ !GB1L4) # GND;

--GB1L6 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~629 at LCCOMB_X15_Y6_N12
GB1L6 = CARRY(FB1L106 & (FB1L76 # !GB1L4) # !FB1L106 & FB1L76 & !GB1L4);


--GB1L7 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~630 at LCCOMB_X15_Y6_N14
GB1L7 = FB1L107 & (FB1L77 & GB1L6 & VCC # !FB1L77 & !GB1L6) # !FB1L107 & (FB1L77 & !GB1L6 # !FB1L77 & (GB1L6 # GND));

--GB1L8 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~631 at LCCOMB_X15_Y6_N14
GB1L8 = CARRY(FB1L107 & !FB1L77 & !GB1L6 # !FB1L107 & (!GB1L6 # !FB1L77));


--GB1L9 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~632 at LCCOMB_X15_Y6_N16
GB1L9 = (FB1L78 $ FB1L108 $ !GB1L8) # GND;

--GB1L10 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~633 at LCCOMB_X15_Y6_N16
GB1L10 = CARRY(FB1L78 & (FB1L108 # !GB1L8) # !FB1L78 & FB1L108 & !GB1L8);


--GB1L11 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~634 at LCCOMB_X15_Y6_N18
GB1L11 = FB1L79 & (FB1L109 & GB1L10 & VCC # !FB1L109 & !GB1L10) # !FB1L79 & (FB1L109 & !GB1L10 # !FB1L109 & (GB1L10 # GND));

--GB1L12 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~635 at LCCOMB_X15_Y6_N18
GB1L12 = CARRY(FB1L79 & !FB1L109 & !GB1L10 # !FB1L79 & (!GB1L10 # !FB1L109));


--GB1L13 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~636 at LCCOMB_X15_Y6_N20
GB1L13 = (FB1L110 $ FB1L80 $ !GB1L12) # GND;

--GB1L14 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~637 at LCCOMB_X15_Y6_N20
GB1L14 = CARRY(FB1L110 & (FB1L80 # !GB1L12) # !FB1L110 & FB1L80 & !GB1L12);


--GB1L15 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~638 at LCCOMB_X15_Y6_N22
GB1L15 = FB1L81 & (FB1L111 & GB1L14 & VCC # !FB1L111 & !GB1L14) # !FB1L81 & (FB1L111 & !GB1L14 # !FB1L111 & (GB1L14 # GND));

--GB1L16 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~639 at LCCOMB_X15_Y6_N22
GB1L16 = CARRY(FB1L81 & !FB1L111 & !GB1L14 # !FB1L81 & (!GB1L14 # !FB1L111));


--GB1L17 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~640 at LCCOMB_X15_Y6_N24
GB1L17 = (FB1L112 $ FB1L82 $ !GB1L16) # GND;

--GB1L18 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~641 at LCCOMB_X15_Y6_N24
GB1L18 = CARRY(FB1L112 & (FB1L82 # !GB1L16) # !FB1L112 & FB1L82 & !GB1L16);


--GB1L19 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~642 at LCCOMB_X15_Y6_N26
GB1L19 = FB1L113 & (FB1L83 & GB1L18 & VCC # !FB1L83 & !GB1L18) # !FB1L113 & (FB1L83 & !GB1L18 # !FB1L83 & (GB1L18 # GND));

--GB1L20 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~643 at LCCOMB_X15_Y6_N26
GB1L20 = CARRY(FB1L113 & !FB1L83 & !GB1L18 # !FB1L113 & (!GB1L18 # !FB1L83));


--GB1L21 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~644 at LCCOMB_X15_Y6_N28
GB1L21 = (FB1L84 $ FB1L114 $ !GB1L20) # GND;

--GB1L22 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~645 at LCCOMB_X15_Y6_N28
GB1L22 = CARRY(FB1L84 & (FB1L114 # !GB1L20) # !FB1L84 & FB1L114 & !GB1L20);


--GB1L23 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~646 at LCCOMB_X15_Y6_N30
GB1L23 = FB1L85 & (FB1L115 & GB1L22 & VCC # !FB1L115 & !GB1L22) # !FB1L85 & (FB1L115 & !GB1L22 # !FB1L115 & (GB1L22 # GND));

--GB1L24 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~647 at LCCOMB_X15_Y6_N30
GB1L24 = CARRY(FB1L85 & !FB1L115 & !GB1L22 # !FB1L85 & (!GB1L22 # !FB1L115));


--GB1L25 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~648 at LCCOMB_X15_Y5_N0
GB1L25 = (FB1L116 $ FB1L86 $ !GB1L24) # GND;

--GB1L26 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~649 at LCCOMB_X15_Y5_N0
GB1L26 = CARRY(FB1L116 & (FB1L86 # !GB1L24) # !FB1L116 & FB1L86 & !GB1L24);


--GB1L27 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~650 at LCCOMB_X15_Y5_N2
GB1L27 = FB1L87 & (FB1L117 & GB1L26 & VCC # !FB1L117 & !GB1L26) # !FB1L87 & (FB1L117 & !GB1L26 # !FB1L117 & (GB1L26 # GND));

--GB1L28 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~651 at LCCOMB_X15_Y5_N2
GB1L28 = CARRY(FB1L87 & !FB1L117 & !GB1L26 # !FB1L87 & (!GB1L26 # !FB1L117));


--GB1L29 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~652 at LCCOMB_X15_Y5_N4
GB1L29 = (FB1L88 $ FB1L118 $ !GB1L28) # GND;

--GB1L30 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~653 at LCCOMB_X15_Y5_N4
GB1L30 = CARRY(FB1L88 & (FB1L118 # !GB1L28) # !FB1L88 & FB1L118 & !GB1L28);


--GB1L31 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~654 at LCCOMB_X15_Y5_N6
GB1L31 = FB1L119 & (FB1L89 & GB1L30 & VCC # !FB1L89 & !GB1L30) # !FB1L119 & (FB1L89 & !GB1L30 # !FB1L89 & (GB1L30 # GND));

--GB1L32 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~655 at LCCOMB_X15_Y5_N6
GB1L32 = CARRY(FB1L119 & !FB1L89 & !GB1L30 # !FB1L119 & (!GB1L30 # !FB1L89));


--GB1L33 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~656 at LCCOMB_X15_Y5_N8
GB1L33 = (FB1L120 $ FB1L90 $ !GB1L32) # GND;

--GB1L34 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~657 at LCCOMB_X15_Y5_N8
GB1L34 = CARRY(FB1L120 & (FB1L90 # !GB1L32) # !FB1L120 & FB1L90 & !GB1L32);


--GB1L35 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~658 at LCCOMB_X15_Y5_N10
GB1L35 = FB1L121 & (FB1L91 & GB1L34 & VCC # !FB1L91 & !GB1L34) # !FB1L121 & (FB1L91 & !GB1L34 # !FB1L91 & (GB1L34 # GND));

--GB1L36 is lpm_mult0:inst6|lpm_mult:lpm_mult_component|mult_o0r:auto_generated|add_sub_37h:add_sub5|add_sub_cella[0]~659 at LCCOMB_X15_Y5_N10
GB1L36 = CARRY(FB1L121 & !FB1L91 & !GB1L34 # !FB1L121 & (!GB1L34 # !FB1L91));