fft64_tbw.v

调用FPGA的IP核实现FFT运算

`timescale 1ns / 1ps

////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer:
//
// Create Date:   11:22:29 06/04/2008
// Design Name:   fft64
// Module Name:   E:/FPGA/FPGA_Prog/study_FFTcore/fft64_tbw.v
// Project Name:  study_FFTcore
// Target Device:  
// Tool versions:  
// Description: 
//
// Verilog Test Fixture created by ISE for module: fft64
//
// Dependencies:
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
////////////////////////////////////////////////////////////////////////////////

module fft64_tbw_v;

	// Inputs
	reg sclr;
	reg ce;
	reg fwd_inv_we;
	reg start;
	reg fwd_inv;
	reg unload;
	reg clk;
	reg signed [7:0] xn_re;
	reg signed [7:0] xn_im;

	// Outputs
	wire rfd;
	wire dv;
	wire done;
	wire busy;
	wire edone;
	wire [4:0] blk_exp;
	wire signed [7:0] xk_im;
	wire [5:0] xn_index;
	wire signed [7:0] xk_re;
	wire [5:0] xk_index;

	parameter  VCC = 1'b1;
	parameter  GND = 1'b0;
		
	// Instantiate the Unit Under Test (UUT)
	fft64 uut (
		.sclr(sclr), 
		.ce(ce), 
		.fwd_inv_we(fwd_inv_we), 
		.rfd(rfd), 
		.start(start), 
		.fwd_inv(fwd_inv), 
		.dv(dv), 
		.unload(unload), 
		.done(done), 
		.clk(clk), 
		.busy(busy), 
		.edone(edone), 
		.xn_re(xn_re), 
		.blk_exp(blk_exp), 
		.xk_im(xk_im), 
		.xn_index(xn_index), 
		.xk_re(xk_re), 
		.xn_im(xn_im), 
		.xk_index(xk_index)
	);

	parameter FFT_DOT_NUM = 64;
	parameter FFT_DOT_NUM_1 = 63;

	integer i,index;
	integer fd1,fd2;
	
	reg[7:0] Imagtable[FFT_DOT_NUM-1 : 0];
	reg[7:0] Realtable[FFT_DOT_NUM_1 : 0];



	initial begin
		// Initialize Inputs
		sclr = 0;
		ce = VCC;
		fwd_inv_we = VCC;
		start = 0;
		fwd_inv = VCC;
		unload = 0;
		clk = 0;
		xn_re = 0;
		xn_im = 0;

		// Wait 100 ns for global reset to finish
		#100;
		
      //读正弦信号数据
		$readmemh("fft_re.dat", Realtable, 0,FFT_DOT_NUM_1 );
		$readmemh("fft_im.dat", Imagtable, 0,FFT_DOT_NUM_1 );

      #8 sclr = 1;
		#16 sclr = 0; 
		#78 start = 1;
		#12;
      for(index = 0; index < (FFT_DOT_NUM); index = index + 1)
			begin
			   #4
				xn_re[7:0] = Realtable[index];
				xn_im[7:0] = Imagtable[index];
				
         end

      fd1 = $fopen("fft_output_re.dat");
		fd2 = $fopen("fft_output_im.dat");		
	end
	
	always @ (posedge clk )
		if(dv)
			begin
				$fdisplay(fd1, "%d", xk_re);
				$fdisplay(fd2, "%d", xk_im);
			end			


initial 
		begin
		  #1300;
			$fclose(fd1);
			$fclose(fd2);
		  $finish(1);
end			
			
/*	initial 
		begin
		  #181146;
			for(i=0;i<FFT_DOT_NUM;i=i+1)
			begin
			#4;
			$fdisplay(fd1, "%d", xk_re);
			$fdisplay(fd2, "%d", xk_im);
			end
		
			#4;
			$fclose(fd1);
			$fclose(fd2);
	end  	*/

		// Add stimulus here	
	always #2 clk = ~clk;   

	initial begin
		$monitor($time,"done=%b busy = %b",done,busy);
	end
	
	always @ (posedge clk)
		unload <=done;
	
	
	
endmodule