fft64_xfft_v4_1_xst_1_vhdl.prj

调用FPGA的IP核实现FFT运算

vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\mux_bus_sclr.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\mux_bus16.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\mux_bus2.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\mux_bus2_1.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\mux_bus8.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\pipe_add_sub_rtl.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\reg_fde.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\reg_fde_sclr.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\reg_fde_sr_1.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\reg_fdre.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\reg_re_rtl.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\reg_rs_rtl.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\shift_ram.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\sub_byp.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\sub_byp_j.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\subtracter.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\xnor_bit_gate.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\xor_bit_gate.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\arith_shift1.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\arith_shift3.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\bf_dsp.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\bf_dsp_bypass.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\bf_dsp_mul_j_bypass.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\bfly_byp.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\bfly_byp_j.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\butterfly.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\butterfly_dsp48.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\butterfly_dsp48_bypass.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\butterfly_dsp48_mul_j_bypass.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\butterfly_dsp48a.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\butterfly_dsp48a_bypass.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\butterfly_dsp48a_mul_j_bypass.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\butterfly_dsp48e.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\butterfly_dsp48e_bypass.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\butterfly_dsp48e_mul_j_bypass.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\butterfly_dsp48e_simd.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\butterfly_dsp48e_simd_bypass.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\butterfly_dsp48e_simd_mul_j_bypass.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\cmpy.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\cmpy_18x18.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\cmpy_3_dsp48.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\cmpy_35x18.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\cmpy_35x35.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\cmpy_52x18.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\cmpy_axb_plus_cxd.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\cmpy_axb_plus_cxd_casc.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\cmpy_mult_add.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\cmpy_mult18x18.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\cmpy_mult35x18.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\cmpy_mult35x35.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\cmpy_so_sync.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\complex_mult3.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\complex_mult4.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\dfly_byp.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\dragonfly_dsp48_bypass.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\flow_control_b.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\flow_control_c.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\in_ranger.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\in_switch4.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\max2_2.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\out_addr_gen_b.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\out_switch4.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\overflow_gen.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\pe4.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\r2_in_addr.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\r2_ovflo_gen.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\r2_pe.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\r2_ranger.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\r2_rw_addr.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\r2_tw_addr.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\r22_bf.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\r22_bf_sp.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\r22_bfly_byp.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\r22_cnt_ctrl.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\r22_flow_ctrl.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\r22_memory.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\r22_ovflo.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\r22_busy.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\r22_pe.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\r22_tw_gen.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\r4_ranger.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\range_r2.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\range_r4.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\rw_addr_gen_b.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\scale_logic.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\so_addr_gen.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\so_control.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\so_control_fsm.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\so_datapath.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\so_io_addr_gen.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\so_memory.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\so_n_counter.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\so_ranger.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\so_run_addr_gen_rotator.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\so_run_addr_gen_left_shift.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\so_run_addr_gen.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\spec_fifo.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\tw_addr_gen.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\tw_gen_p2.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\tw_gen_p4.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\twgen_distmem.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\twgen_distmem_so.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\twgen_half_sincos.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\twgen_quarter_sin.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\twiddle_gen.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\twos_comp.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\unbiased_round.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\xfft_v4_1_b.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\xfft_v4_1_c.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\xfft_v4_1_d.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\xfft_v4_1_e.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\xfft_v4_1\xfft_v4_1_xst.vhd"
vhdl xfft_v4_1 "E:\FPGA\FPGA_Prog\study_FFTcore\tmp\_cg\_bbx\fft64_xfft_v4_1_xst_1.vhd"