lcd.smp_dump.txt

利用verilogＨＤＬ语言实现ＬＣＤ的驱动编程

State Machine - |lcd|state
Name state.s1 state.s2 state.s3 state.s4 state.s5 state.s6 state.s7 state.s8 state.s9 state.s10 state.s11 state.s12 state.s13 state.01110 state.s15 state.s16 state.s17 state.s18 state.s19 
state.s19 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
state.s18 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 
state.s17 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 
state.s16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 
state.s15 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 
state.01110 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 
state.s13 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 
state.s12 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 
state.s11 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 
state.s10 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 
state.s9 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 
state.s8 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 
state.s7 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 
state.s6 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 
state.s5 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
state.s4 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
state.s3 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
state.s2 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
state.s1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1