📄 summator.rpt
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-- Node name is 'c'
-- Equation name is 'c', type is output
c = _LC8_K14;
-- Node name is 'C0'
-- Equation name is 'C0', type is output
C0 = _LC1_K14;
-- Node name is 'd'
-- Equation name is 'd', type is output
d = _LC2_K14;
-- Node name is 'e'
-- Equation name is 'e', type is output
e = _LC1_K15;
-- Node name is 'f'
-- Equation name is 'f', type is output
f = _LC4_K15;
-- Node name is 'g'
-- Equation name is 'g', type is output
g = _LC4_K18;
-- Node name is '|summator1:1|:2' = '|summator1:1|C0'
-- Equation name is '_LC4_K11', type is buried
_LC4_K11 = LCELL( _EQ001);
_EQ001 = A0 & B0
# B0 & CI
# A0 & CI;
-- Node name is '|summator1:1|:3' = '|summator1:1|S'
-- Equation name is '_LC2_K11', type is buried
_LC2_K11 = LCELL( _EQ002);
_EQ002 = A0 & B0 & CI
# !A0 & B0 & !CI
# A0 & !B0 & !CI
# !A0 & !B0 & CI;
-- Node name is '|summator1:2|:2' = '|summator1:2|C0'
-- Equation name is '_LC3_K11', type is buried
_LC3_K11 = LCELL( _EQ003);
_EQ003 = B1 & _LC4_K11
# A1 & _LC4_K11
# A1 & B1;
-- Node name is '|summator1:2|:3' = '|summator1:2|S'
-- Equation name is '_LC1_K11', type is buried
_LC1_K11 = LCELL( _EQ004);
_EQ004 = !A1 & B1 & !_LC4_K11
# A1 & !B1 & !_LC4_K11
# A1 & B1 & _LC4_K11
# !A1 & !B1 & _LC4_K11;
-- Node name is '|summator1:3|:2' = '|summator1:3|C0'
-- Equation name is '_LC6_K14', type is buried
_LC6_K14 = LCELL( _EQ005);
_EQ005 = B2 & _LC3_K11
# A2 & _LC3_K11
# A2 & B2;
-- Node name is '|summator1:3|:3' = '|summator1:3|S'
-- Equation name is '_LC4_K14', type is buried
_LC4_K14 = LCELL( _EQ006);
_EQ006 = A2 & B2 & _LC3_K11
# !A2 & !B2 & _LC3_K11
# !A2 & B2 & !_LC3_K11
# A2 & !B2 & !_LC3_K11;
-- Node name is '|summator1:4|:2' = '|summator1:4|C0'
-- Equation name is '_LC1_K14', type is buried
_LC1_K14 = LCELL( _EQ007);
_EQ007 = A3 & _LC6_K14
# B3 & _LC6_K14
# A3 & B3;
-- Node name is '|summator1:4|:3' = '|summator1:4|S'
-- Equation name is '_LC3_K14', type is buried
_LC3_K14 = LCELL( _EQ008);
_EQ008 = A3 & B3 & _LC6_K14
# !A3 & !B3 & _LC6_K14
# A3 & !B3 & !_LC6_K14
# !A3 & B3 & !_LC6_K14;
-- Node name is '|7448:30|:69' = '|7448:30|OA'
-- Equation name is '_LC6_K11', type is buried
_LC6_K11 = LCELL( _EQ009);
_EQ009 = !_LC1_K11 & !_LC2_K11 & !_LC4_K14
# !_LC1_K11 & _LC3_K14 & !_LC4_K14
# _LC1_K11 & !_LC3_K14 & !_LC4_K14
# !_LC2_K11 & !_LC3_K14 & !_LC4_K14
# !_LC1_K11 & _LC2_K11 & _LC4_K14
# !_LC1_K11 & _LC2_K11 & _LC3_K14
# _LC1_K11 & _LC2_K11 & !_LC3_K14
# _LC2_K11 & !_LC3_K14 & _LC4_K14;
-- Node name is '|7448:30|:68' = '|7448:30|OB'
-- Equation name is '_LC5_K14', type is buried
_LC5_K14 = LCELL( _EQ010);
_EQ010 = !_LC1_K11 & !_LC2_K11
# !_LC1_K11 & !_LC4_K14
# _LC1_K11 & _LC2_K11 & !_LC3_K14
# !_LC3_K14 & !_LC4_K14;
-- Node name is '|7448:30|:70' = '|7448:30|OC'
-- Equation name is '_LC8_K14', type is buried
_LC8_K14 = LCELL( _EQ011);
_EQ011 = !_LC1_K11 & !_LC3_K14
# !_LC1_K11 & !_LC4_K14
# _LC2_K11 & !_LC3_K14
# _LC2_K11 & !_LC4_K14
# !_LC3_K14 & _LC4_K14;
-- Node name is '|7448:30|:67' = '|7448:30|OD'
-- Equation name is '_LC2_K14', type is buried
_LC2_K14 = LCELL( _EQ012);
_EQ012 = _LC1_K11 & !_LC2_K11
# _LC1_K11 & !_LC4_K14
# !_LC1_K11 & _LC2_K11 & _LC4_K14
# !_LC2_K11 & !_LC4_K14;
-- Node name is '|7448:30|:71' = '|7448:30|OE'
-- Equation name is '_LC1_K15', type is buried
_LC1_K15 = LCELL( _EQ013);
_EQ013 = _LC1_K11 & !_LC2_K11
# !_LC2_K11 & !_LC4_K14;
-- Node name is '|7448:30|:66' = '|7448:30|OF'
-- Equation name is '_LC4_K15', type is buried
_LC4_K15 = LCELL( _EQ014);
_EQ014 = !_LC1_K11 & _LC3_K14
# !_LC1_K11 & !_LC2_K11
# !_LC1_K11 & _LC4_K14
# !_LC2_K11 & _LC4_K14;
-- Node name is '|7448:30|:72' = '|7448:30|OG'
-- Equation name is '_LC4_K18', type is buried
_LC4_K18 = LCELL( _EQ015);
_EQ015 = !_LC1_K11 & _LC4_K14
# !_LC1_K11 & _LC3_K14
# _LC1_K11 & !_LC2_K11
# !_LC2_K11 & _LC4_K14
# !_LC2_K11 & _LC3_K14
# _LC1_K11 & !_LC4_K14
# _LC3_K14 & !_LC4_K14;
Project Information g:\cpld_example\summator\summator.rpt
** COMPILATION SETTINGS & TIMES **
Processing Menu Commands
------------------------
Design Doctor = off
Logic Synthesis:
Synthesis Type Used = Multi-Level
Default Synthesis Style = NORMAL
Logic option settings in 'NORMAL' style for 'ACEX1K' family
CARRY_CHAIN = ignore
CARRY_CHAIN_LENGTH = 32
CASCADE_CHAIN = ignore
CASCADE_CHAIN_LENGTH = 2
DECOMPOSE_GATES = on
DUPLICATE_LOGIC_EXTRACTION = on
MINIMIZATION = full
MULTI_LEVEL_FACTORING = on
NOT_GATE_PUSH_BACK = on
REDUCE_LOGIC = on
REFACTORIZATION = on
REGISTER_OPTIMIZATION = on
RESYNTHESIZE_NETWORK = on
SLOW_SLEW_RATE = off
SUBFACTOR_EXTRACTION = on
IGNORE_SOFT_BUFFERS = on
USE_LPM_FOR_AHDL_OPERATORS = off
Other logic synthesis settings:
Automatic Global Clock = on
Automatic Global Clear = on
Automatic Global Preset = on
Automatic Global Output Enable = on
Automatic Fast I/O = off
Automatic Register Packing = off
Automatic Open-Drain Pins = on
Automatic Implement in EAB = off
Optimize = 5
Default Timing Specifications: None
Cut All Bidir Feedback Timing Paths = on
Cut All Clear & Preset Timing Paths = on
Ignore Timing Assignments = off
Functional SNF Extractor = off
Linked SNF Extractor = off
Timing SNF Extractor = on
Optimize Timing SNF = off
Generate AHDL TDO File = off
Fitter Settings = NORMAL
Use Quartus Fitter = on
Smart Recompile = off
Total Recompile = off
Interfaces Menu Commands
------------------------
EDIF Netlist Writer = off
Verilog Netlist Writer = off
VHDL Netlist Writer = off
Compilation Times
-----------------
Compiler Netlist Extractor 00:00:00
Database Builder 00:00:00
Logic Synthesizer 00:00:00
Partitioner 00:00:00
Fitter 00:00:04
Timing SNF Extractor 00:00:01
Assembler 00:00:01
-------------------------- --------
Total Time 00:00:06
Memory Allocated
-----------------
Peak memory allocated during compilation = 53,065K
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