logic_7474.fit

一个关于VHDL的cpld开发实验程序

-- MAX+plus II Compiler Fit File      
-- Version 10.2 07/10/2002            
-- Compiled: 11/19/2004 09:50:48      

-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "logic_7474"
BEGIN

    DEVICE = "EP1K100QC208-3";

    "cp"                           : INPUT_PIN  = 79     ;
    "out0"                         : OUTPUT_PIN = 14     ;
    "out1"                         : OUTPUT_PIN = 139    ;
    "|7474:1|:9"                   : LOCATION   = LC3_C49;  -- |7474:1|1Q
    "|7474:1|:10"                  : LOCATION   = LC5_C49;  -- |7474:1|2Q

END;

INTERNAL_INFO "logic_7474"
BEGIN
	DEVICE = EP1K100QC208-3;
    OD5P79  : LORAX = "1:FB5->LC3_C49|";
    LC3_C49 : LORAX = "1:MSW2R2C49,G62R2->OH2R2P14|";
    LC5_C49 : LORAX = "1:MSW4R2C48,G204R2->OH12R2P139|";
	LC3_C49 : LORAX2 = "X, X, X, LC3_C49";
	LC5_C49 : LORAX2 = "X, X, X, LC5_C49";
END;