pocp.tan.qmsg

简单的i/O接口的vhdl设计

{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "CLK " "Info: Assuming node \"CLK\" is an undefined clock" {  } { { "pocp.bdf" "" { Schematic "E:/pocp/pocp.bdf" { { 168 40 208 184 "CLK" "" } } } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CLK" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0} { "Info" "ITAN_NODE_MAP_TO_CLK" "RESET " "Info: Assuming node \"RESET\" is an undefined clock" {  } { { "pocp.bdf" "" { Schematic "E:/pocp/pocp.bdf" { { 264 0 168 280 "RESET" "" } } } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "RESET" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0}
{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "10 " "Warning: Found 10 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_GATED_CLK" "printer:inst\|74193:7\|6~11 " "Info: Detected gated clock \"printer:inst\|74193:7\|6~11\" as buffer" {  } { { "74193.bdf" "" { Schematic "c:/altera/quartus51/libraries/others/maxplus2/74193.bdf" { { 312 384 448 352 "6" "" } } } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "printer:inst\|74193:7\|6~11" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "printer:inst\|3 " "Info: Detected gated clock \"printer:inst\|3\" as buffer" {  } { { "printer.bdf" "" { Schematic "E:/pocp/printer.bdf" { { 304 616 680 344 "3" "" } } } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "printer:inst\|3" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "printer:inst\|74193:7\|25 " "Info: Detected ripple clock \"printer:inst\|74193:7\|25\" as buffer" {  } { { "74193.bdf" "" { Schematic "c:/altera/quartus51/libraries/others/maxplus2/74193.bdf" { { 320 736 800 400 "25" "" } } } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "printer:inst\|74193:7\|25" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "printer:inst\|74193:7\|26 " "Info: Detected ripple clock \"printer:inst\|74193:7\|26\" as buffer" {  } { { "74193.bdf" "" { Schematic "c:/altera/quartus51/libraries/others/maxplus2/74193.bdf" { { 80 736 800 160 "26" "" } } } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "printer:inst\|74193:7\|26" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "POC:inst1\|TR " "Info: Detected ripple clock \"POC:inst1\|TR\" as buffer" {  } { { "POC.vhd" "" { Text "E:/pocp/POC.vhd" 8 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "POC:inst1\|TR" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "printer:inst\|74193:7\|24 " "Info: Detected ripple clock \"printer:inst\|74193:7\|24\" as buffer" {  } { { "74193.bdf" "" { Schematic "c:/altera/quartus51/libraries/others/maxplus2/74193.bdf" { { 560 736 800 640 "24" "" } } } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "printer:inst\|74193:7\|24" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "printer:inst\|74193:7\|28~14 " "Info: Detected gated clock \"printer:inst\|74193:7\|28~14\" as buffer" {  } { { "74193.bdf" "" { Schematic "c:/altera/quartus51/libraries/others/maxplus2/74193.bdf" { { 1064 584 648 1168 "28" "" } } } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "printer:inst\|74193:7\|28~14" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "printer:inst\|74193:7\|28~15 " "Info: Detected gated clock \"printer:inst\|74193:7\|28~15\" as buffer" {  } { { "74193.bdf" "" { Schematic "c:/altera/quartus51/libraries/others/maxplus2/74193.bdf" { { 1064 584 648 1168 "28" "" } } } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "printer:inst\|74193:7\|28~15" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "printer:inst\|4 " "Info: Detected gated clock \"printer:inst\|4\" as buffer" {  } { { "printer.bdf" "" { Schematic "E:/pocp/printer.bdf" { { 392 488 552 432 "4" "" } } } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "printer:inst\|4" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "printer:inst\|74193:7\|23 " "Info: Detected ripple clock \"printer:inst\|74193:7\|23\" as buffer" {  } { { "74193.bdf" "" { Schematic "c:/altera/quartus51/libraries/others/maxplus2/74193.bdf" { { 800 736 800 880 "23" "" } } } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "printer:inst\|74193:7\|23" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0}  } {  } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0}