pocp.tan.qmsg

简单的i/O接口的vhdl设计

{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Info" "ITAN_SCC_LOOP" "4 " "Info: Found combinational loop of 4 nodes" { { "Info" "ITAN_SCC_NODE" "printer:inst\|2 " "Info: Node \"printer:inst\|2\"" {  } { { "printer.bdf" "" { Schematic "E:/pocp/printer.bdf" { { 496 488 552 536 "2" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0} { "Info" "ITAN_SCC_NODE" "printer:inst\|4 " "Info: Node \"printer:inst\|4\"" {  } { { "printer.bdf" "" { Schematic "E:/pocp/printer.bdf" { { 392 488 552 432 "4" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0} { "Info" "ITAN_SCC_NODE" "printer:inst\|74193:7\|28~14 " "Info: Node \"printer:inst\|74193:7\|28~14\"" {  } { { "74193.bdf" "" { Schematic "c:/altera/quartus51/libraries/others/maxplus2/74193.bdf" { { 1064 584 648 1168 "28" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0} { "Info" "ITAN_SCC_NODE" "printer:inst\|74193:7\|28~15 " "Info: Node \"printer:inst\|74193:7\|28~15\"" {  } { { "74193.bdf" "" { Schematic "c:/altera/quartus51/libraries/others/maxplus2/74193.bdf" { { 1064 584 648 1168 "28" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0}  } { { "printer.bdf" "" { Schematic "E:/pocp/printer.bdf" { { 496 488 552 536 "2" "" } } } } { "printer.bdf" "" { Schematic "E:/pocp/printer.bdf" { { 392 488 552 432 "4" "" } } } } { "74193.bdf" "" { Schematic "c:/altera/quartus51/libraries/others/maxplus2/74193.bdf" { { 1064 584 648 1168 "28" "" } } } } { "74193.bdf" "" { Schematic "c:/altera/quartus51/libraries/others/maxplus2/74193.bdf" { { 1064 584 648 1168 "28" "" } } } }  } 0 0 "Found combinational loop of %1!d! nodes" 0 0}