pocp.tan.rpt

简单的i/O接口的vhdl设计

                Info: Loc. = LC_X3_Y2_N5; Node "printer:inst|74193:7|28~14"
            Info: 3: + IC(0.748 ns) + CELL(0.319 ns) = 5.034 ns; Loc. = LC_X4_Y2_N6; Fanout = 1; COMB Node = 'printer:inst|3'
            Info: 4: + IC(0.420 ns) + CELL(0.809 ns) = 6.263 ns; Loc. = LC_X4_Y2_N9; Fanout = 7; REG Node = 'printer:inst|74193:7|26'
            Info: 5: + IC(0.000 ns) + CELL(1.161 ns) = 7.424 ns; Loc. = LC_X3_Y2_N5; Fanout = 2; COMB LOOP Node = 'printer:inst|74193:7|28~14'
                Info: Loc. = LC_X2_Y2_N6; Node "printer:inst|2"
                Info: Loc. = LC_X3_Y2_N6; Node "printer:inst|4"
                Info: Loc. = LC_X3_Y2_N1; Node "printer:inst|74193:7|28~15"
                Info: Loc. = LC_X3_Y2_N5; Node "printer:inst|74193:7|28~14"
            Info: 6: + IC(1.050 ns) + CELL(0.809 ns) = 9.283 ns; Loc. = LC_X3_Y3_N8; Fanout = 6; REG Node = 'printer:inst|74193:7|24'
            Info: 7: + IC(0.000 ns) + CELL(1.378 ns) = 10.661 ns; Loc. = LC_X3_Y2_N1; Fanout = 3; COMB LOOP Node = 'printer:inst|74193:7|28~15'
                Info: Loc. = LC_X2_Y2_N6; Node "printer:inst|2"
                Info: Loc. = LC_X3_Y2_N6; Node "printer:inst|4"
                Info: Loc. = LC_X3_Y2_N1; Node "printer:inst|74193:7|28~15"
                Info: Loc. = LC_X3_Y2_N5; Node "printer:inst|74193:7|28~14"
            Info: 8: + IC(0.419 ns) + CELL(0.574 ns) = 11.654 ns; Loc. = LC_X3_Y2_N8; Fanout = 7; REG Node = 'printer:inst|74193:7|23'
            Info: Total cell delay = 9.017 ns ( 77.37 % )
            Info: Total interconnect delay = 2.637 ns ( 22.63 % )
    Info: + Micro clock to output delay of source is 0.235 ns
    Info: + Micro setup delay of destination is 0.208 ns
Warning: Circuit may not operate. Detected 3 non-operational path(s) clocked by clock "CLK" with clock skew larger than data delay. See Compilation Report for details.
Info: Found hold time violation between source  pin or register "printer:inst|74193:7|23" and destination pin or register "printer:inst|74193:7|23" for clock "CLK" (Hold time is 9.555 ns)
    Info: + Largest clock skew is 10.592 ns
        Info: + Longest clock path from clock "CLK" to destination register is 14.963 ns
            Info: 1: + IC(0.000 ns) + CELL(0.727 ns) = 0.727 ns; Loc. = PIN_14; Fanout = 27; CLK Node = 'CLK'
            Info: 2: + IC(1.223 ns) + CELL(0.462 ns) = 2.412 ns; Loc. = LC_X4_Y2_N5; Fanout = 1; COMB Node = 'printer:inst|74193:7|6~11'
            Info: 3: + IC(0.420 ns) + CELL(0.809 ns) = 3.641 ns; Loc. = LC_X4_Y2_N4; Fanout = 6; REG Node = 'printer:inst|74193:7|25'
            Info: 4: + IC(0.000 ns) + CELL(0.946 ns) = 4.587 ns; Loc. = LC_X3_Y2_N5; Fanout = 2; COMB LOOP Node = 'printer:inst|74193:7|28~14'
                Info: Loc. = LC_X2_Y2_N6; Node "printer:inst|2"
                Info: Loc. = LC_X3_Y2_N6; Node "printer:inst|4"
                Info: Loc. = LC_X3_Y2_N1; Node "printer:inst|74193:7|28~15"
                Info: Loc. = LC_X3_Y2_N5; Node "printer:inst|74193:7|28~14"
            Info: 5: + IC(1.050 ns) + CELL(0.809 ns) = 6.446 ns; Loc. = LC_X3_Y3_N8; Fanout = 6; REG Node = 'printer:inst|74193:7|24'
            Info: 6: + IC(0.000 ns) + CELL(3.266 ns) = 9.712 ns; Loc. = LC_X3_Y2_N6; Fanout = 5; COMB LOOP Node = 'printer:inst|4'
                Info: Loc. = LC_X2_Y2_N6; Node "printer:inst|2"
                Info: Loc. = LC_X3_Y2_N6; Node "printer:inst|4"
                Info: Loc. = LC_X3_Y2_N1; Node "printer:inst|74193:7|28~15"
                Info: Loc. = LC_X3_Y2_N5; Node "printer:inst|74193:7|28~14"
            Info: 7: + IC(0.748 ns) + CELL(0.319 ns) = 10.779 ns; Loc. = LC_X4_Y2_N6; Fanout = 1; COMB Node = 'printer:inst|3'
            Info: 8: + IC(0.420 ns) + CELL(0.809 ns) = 12.008 ns; Loc. = LC_X4_Y2_N9; Fanout = 7; REG Node = 'printer:inst|74193:7|26'
            Info: 9: + IC(0.000 ns) + CELL(1.962 ns) = 13.970 ns; Loc. = LC_X3_Y2_N1; Fanout = 3; COMB LOOP Node = 'printer:inst|74193:7|28~15'
                Info: Loc. = LC_X2_Y2_N6; Node "printer:inst|2"
                Info: Loc. = LC_X3_Y2_N6; Node "printer:inst|4"
                Info: Loc. = LC_X3_Y2_N1; Node "printer:inst|74193:7|28~15"
                Info: Loc. = LC_X3_Y2_N5; Node "printer:inst|74193:7|28~14"
            Info: 10: + IC(0.419 ns) + CELL(0.574 ns) = 14.963 ns; Loc. = LC_X3_Y2_N8; Fanout = 7; REG Node = 'printer:inst|74193:7|23'
            Info: Total cell delay = 10.683 ns ( 71.40 % )
            Info: Total interconnect delay = 4.280 ns ( 28.60 % )
        Info: - Shortest clock path from clock "CLK" to source register is 4.371 ns
            Info: 1: + IC(0.000 ns) + CELL(0.727 ns) = 0.727 ns; Loc. = PIN_14; Fanout = 27; CLK Node = 'CLK'
            Info: 2: + IC(0.000 ns) + CELL(2.651 ns) = 3.378 ns; Loc. = LC_X3_Y2_N1; Fanout = 3; COMB LOOP Node = 'printer:inst|74193:7|28~15'
                Info: Loc. = LC_X2_Y2_N6; Node "printer:inst|2"
                Info: Loc. = LC_X3_Y2_N6; Node "printer:inst|4"
                Info: Loc. = LC_X3_Y2_N1; Node "printer:inst|74193:7|28~15"
                Info: Loc. = LC_X3_Y2_N5; Node "printer:inst|74193:7|28~14"
            Info: 3: + IC(0.419 ns) + CELL(0.574 ns) = 4.371 ns; Loc. = LC_X3_Y2_N8; Fanout = 7; REG Node = 'printer:inst|74193:7|23'
            Info: Total cell delay = 3.952 ns ( 90.41 % )
            Info: Total interconnect delay = 0.419 ns ( 9.59 % )
    Info: - Micro clock to output delay of source is 0.235 ns
    Info: - Shortest register to register delay is 0.940 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X3_Y2_N8; Fanout = 7; REG Node = 'printer:inst|74193:7|23'
        Info: 2: + IC(0.571 ns) + CELL(0.369 ns) = 0.940 ns; Loc. = LC_X3_Y2_N8; Fanout = 7; REG Node = 'printer:inst|74193:7|23'
        Info: Total cell delay = 0.369 ns ( 39.26 % )
        Info: Total interconnect delay = 0.571 ns ( 60.74 % )
    Info: + Micro hold delay of destination is 0.138 ns
Warning: Circuit may not operate. Detected 2 non-operational path(s) clocked by clock "RESET" with clock skew larger than data delay. See Compilation Report for details.
Info: Found hold time violation between source  pin or register "printer:inst|74193:7|23" and destination pin or register "printer:inst|74193:7|23" for clock "RESET" (Hold time is 3.688 ns)
    Info: + Largest clock skew is 4.725 ns
        Info: + Longest clock path from clock "RESET" to destination register is 11.654 ns
            Info: 1: + IC(0.000 ns) + CELL(0.708 ns) = 0.708 ns; Loc. = PIN_8; Fanout = 15; CLK Node = 'RESET'
            Info: 2: + IC(0.000 ns) + CELL(3.259 ns) = 3.967 ns; Loc. = LC_X3_Y2_N6; Fanout = 5; COMB LOOP Node = 'printer:inst|4'
                Info: Loc. = LC_X2_Y2_N6; Node "printer:inst|2"
                Info: Loc. = LC_X3_Y2_N6; Node "printer:inst|4"
                Info: Loc. = LC_X3_Y2_N1; Node "printer:inst|74193:7|28~15"
                Info: Loc. = LC_X3_Y2_N5; Node "printer:inst|74193:7|28~14"
            Info: 3: + IC(0.748 ns) + CELL(0.319 ns) = 5.034 ns; Loc. = LC_X4_Y2_N6; Fanout = 1; COMB Node = 'printer:inst|3'
            Info: 4: + IC(0.420 ns) + CELL(0.809 ns) = 6.263 ns; Loc. = LC_X4_Y2_N9; Fanout = 7; REG Node = 'printer:inst|74193:7|26'
            Info: 5: + IC(0.000 ns) + CELL(1.161 ns) = 7.424 ns; Loc. = LC_X3_Y2_N5; Fanout = 2; COMB LOOP Node = 'printer:inst|74193:7|28~14'
                Info: Loc. = LC_X2_Y2_N6; Node "printer:inst|2"
                Info: Loc. = LC_X3_Y2_N6; Node "printer:inst|4"
                Info: Loc. = LC_X3_Y2_N1; Node "printer:inst|74193:7|28~15"
                Info: Loc. = LC_X3_Y2_N5; Node "printer:inst|74193:7|28~14"
            Info: 6: + IC(1.050 ns) + CELL(0.809 ns) = 9.283 ns; Loc. = LC_X3_Y3_N8; Fanout = 6; REG Node = 'printer:inst|74193:7|24'
            Info: 7: + IC(0.000 ns) + CELL(1.378 ns) = 10.661 ns; Loc. = LC_X3_Y2_N1; Fanout = 3; COMB LOOP Node = 'printer:inst|74193:7|28~15'
                Info: Loc. = LC_X2_Y2_N6; Node "printer:inst|2"
                Info: Loc. = LC_X3_Y2_N6; Node "printer:inst|4"
                Info: Loc. = LC_X3_Y2_N1; Node "printer:inst|74193:7|28~15"
                Info: Loc. = LC_X3_Y2_N5; Node "printer:inst|74193:7|28~14"
            Info: 8: + IC(0.419 ns) + CELL(0.574 ns) = 11.654 ns; Loc. = LC_X3_Y2_N8; Fanout = 7; REG Node = 'printer:inst|74193:7|23'
            Info: Total cell delay = 9.017 ns ( 77.37 % )
            Info: Total interconnect delay = 2.637 ns ( 22.63 % )
        Info: - Shortest clock path from clock "RESET" to source register is 6.929 ns
            Info: 1: + IC(0.000 ns) + CELL(0.708 ns) = 0.708 ns; Loc. = PIN_8; Fanout = 15; CLK Node = 'RESET'
            Info: 2: + IC(0.000 ns) + CELL(5.228 ns) = 5.936 ns; Loc. = LC_X3_Y2_N1; Fanout = 3; COMB LOOP Node = 'printer:inst|74193:7|28~15'
                Info: Loc. = LC_X2_Y2_N6; Node "printer:inst|2"
                Info: Loc. = LC_X3_Y2_N6; Node "printer:inst|4"
                Info: Loc. = LC_X3_Y2_N1; Node "printer:inst|74193:7|28~15"
                Info: Loc. = LC_X3_Y2_N5; Node "printer:inst|74193:7|28~14"
            Info: 3: + IC(0.419 ns) + CELL(0.574 ns) = 6.929 ns; Loc. = LC_X3_Y2_N8; Fanout = 7; REG Node = 'printer:inst|74193:7|23'
            Info: Total cell delay = 6.510 ns ( 93.95 % )
            Info: Total interconnect delay = 0.419 ns ( 6.05 % )
    Info: - Micro clock to output delay of source is 0.235 ns
    Info: - Shortest register to register delay is 0.940 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X3_Y2_N8; Fanout = 7; REG Node = 'printer:inst|74193:7|23'
        Info: 2: + IC(0.571 ns) + CELL(0.369 ns) = 0.940 ns; Loc. = LC_X3_Y2_N8; Fanout = 7; REG Node = 'printer:inst|74193:7|23'
        Info: Total cell delay = 0.369 ns ( 39.26 % )
        Info: Total interconnect delay = 0.571 ns ( 60.74 % )
    Info: + Micro hold delay of destination is 0.138 ns
Info: tsu for register "POC:inst1|TR" (data pin = "RESET", clock pin = "CLK") is 4.611 ns
    Info: + Longest pin to register delay is 6.496 ns
        Info: 1: + IC(0.000 ns) + CELL(0.708 ns) = 0.708 ns; Loc. = PIN_8; Fanout = 15; CLK Node = 'RESET'
        Info: 2: + IC(0.000 ns) + CELL(5.228 ns) = 5.936 ns; Loc. = LC_X3_Y2_N1; Fanout = 3; COMB LOOP Node = 'printer:inst|74193:7|28~15'
            Info: Loc. = LC_X2_Y2_N6; Node "printer:inst|2"
            Info: Loc. = LC_X3_Y2_N6; Node "printer:inst|4"
            Info: Loc. = LC_X3_Y2_N1; Node "printer:inst|74193:7|28~15"
            Info: Loc. = LC_X3_Y2_N5; Node "printer:inst|74193:7|28~14"
        Info: 3: + IC(0.191 ns) + CELL(0.369 ns) = 6.496 ns; Loc. = LC_X3_Y2_N2; Fanout = 9; REG Node = 'POC:inst1|TR'
        Info: Total cell delay = 6.305 ns ( 97.06 % )
        Info: Total interconnect delay = 0.191 ns ( 2.94 % )
    Info: + Micro setup delay of destination is 0.208 ns
    Info: - Shortest clock path from clock "CLK" to destination register is 2.093 ns
        Info: 1: + IC(0.000 ns) + CELL(0.727 ns) = 0.727 ns; Loc. = PIN_14; Fanout = 27; CLK Node = 'CLK'
        Info: 2: + IC(0.792 ns) + CELL(0.574 ns) = 2.093 ns; Loc. = LC_X3_Y2_N2; Fanout = 9; REG Node = 'POC:inst1|TR'
        Info: Total cell delay = 1.301 ns ( 62.16 % )
        Info: Total interconnect delay = 0.792 ns ( 37.84 % )
Info: tco from clock "CLK" to destination pin "pd[6]" through register "POC:inst1|PD[6]~reg0" is 4.677 ns
    Info: + Longest clock path from clock "CLK" to source register is 2.093 ns
        Info: 1: + IC(0.000 ns) + CELL(0.727 ns) = 0.727 ns; Loc. = PIN_14; Fanout = 27; CLK Node = 'CLK'
        Info: 2: + IC(0.792 ns) + CELL(0.574 ns) = 2.093 ns; Loc. = LC_X2_Y4_N6; Fanout = 1; REG Node = 'POC:inst1|PD[6]~reg0'
        Info: Total cell delay = 1.301 ns ( 62.16 % )
        Info: Total interconnect delay = 0.792 ns ( 37.84 % )
    Info: + Micro clock to output delay of source is 0.235 ns
    Info: +