pocp.tan.summary

简单的i/O接口的vhdl设计

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 4.611 ns
From           : RESET
To             : POC:inst1|TR
From Clock     : --
To Clock       : CLK
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 4.677 ns
From           : POC:inst1|PD[6]~reg0
To             : pd[6]
From Clock     : CLK
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -0.686 ns
From           : data[5]
To             : POC:inst1|BR[5]
From Clock     : --
To Clock       : CLK
Failed Paths   : 0

Type           : Clock Setup: 'CLK'
Slack          : N/A
Required Time  : None
Actual Time    : 54.92 MHz ( period = 18.208 ns )
From           : printer:inst|74193:7|23
To             : POC:inst1|TR
From Clock     : CLK
To Clock       : CLK
Failed Paths   : 0

Type           : Clock Setup: 'RESET'
Slack          : N/A
Required Time  : None
Actual Time    : 163.72 MHz ( period = 6.108 ns )
From           : printer:inst|74193:7|23
To             : printer:inst|74193:7|23
From Clock     : RESET
To Clock       : RESET
Failed Paths   : 0

Type           : Clock Hold: 'CLK'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : printer:inst|74193:7|23
To             : printer:inst|74193:7|23
From Clock     : CLK
To Clock       : CLK
Failed Paths   : 3

Type           : Clock Hold: 'RESET'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : printer:inst|74193:7|23
To             : printer:inst|74193:7|23
From Clock     : RESET
To Clock       : RESET
Failed Paths   : 2

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 5

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