sdc_synthesis.v

高速AD采集卡应用程序及SDRAM控制器

    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/burst_length_cntr_1_rt ),
    .O(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<1>_cyo )
  );
  XORCY \MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<1>_xor  (
    .CI(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<0>_cyo ),
    .LI(\MYSDRAMCNT/burst_length_cntr_1_rt ),
    .O(\MYSDRAMCNT/burst_length_cntr__n0000 [1])
  );
  MUXCY \MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<2>cy  (
    .CI(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<1>_cyo ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/burst_length_cntr_2_rt ),
    .O(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<2>_cyo )
  );
  XORCY \MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<2>_xor  (
    .CI(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<1>_cyo ),
    .LI(\MYSDRAMCNT/burst_length_cntr_2_rt ),
    .O(\MYSDRAMCNT/burst_length_cntr__n0000 [2])
  );
  MUXCY \MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<3>cy  (
    .CI(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<2>_cyo ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/burst_length_cntr_3_rt ),
    .O(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<3>_cyo )
  );
  XORCY \MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<3>_xor  (
    .CI(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<2>_cyo ),
    .LI(\MYSDRAMCNT/burst_length_cntr_3_rt ),
    .O(\MYSDRAMCNT/burst_length_cntr__n0000 [3])
  );
  MUXCY \MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<4>cy  (
    .CI(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<3>_cyo ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/burst_length_cntr_4_rt ),
    .O(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<4>_cyo )
  );
  XORCY \MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<4>_xor  (
    .CI(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<3>_cyo ),
    .LI(\MYSDRAMCNT/burst_length_cntr_4_rt ),
    .O(\MYSDRAMCNT/burst_length_cntr__n0000 [4])
  );
  MUXCY \MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<5>cy  (
    .CI(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<4>_cyo ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/burst_length_cntr_5_rt ),
    .O(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<5>_cyo )
  );
  XORCY \MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<5>_xor  (
    .CI(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<4>_cyo ),
    .LI(\MYSDRAMCNT/burst_length_cntr_5_rt ),
    .O(\MYSDRAMCNT/burst_length_cntr__n0000 [5])
  );
  MUXCY \MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<6>cy  (
    .CI(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<5>_cyo ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/burst_length_cntr_6_rt ),
    .O(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<6>_cyo )
  );
  XORCY \MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<6>_xor  (
    .CI(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<5>_cyo ),
    .LI(\MYSDRAMCNT/burst_length_cntr_6_rt ),
    .O(\MYSDRAMCNT/burst_length_cntr__n0000 [6])
  );
  MUXCY \MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<7>cy  (
    .CI(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<6>_cyo ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/burst_length_cntr_7_rt ),
    .O(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<7>_cyo )
  );
  XORCY \MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<7>_xor  (
    .CI(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<6>_cyo ),
    .LI(\MYSDRAMCNT/burst_length_cntr_7_rt ),
    .O(\MYSDRAMCNT/burst_length_cntr__n0000 [7])
  );
  FDCPE \MYSDRAMCNT/counter_wait_15  (
    .D(\MYSDRAMCNT/counter_wait_inst_sum_15 ),
    .CE(\MYSDRAMCNT/counter_wait_inst_inv_1 ),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .PRE(sd_dqm_0_OBUF),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/counter_wait [15])
  );
  FDCPE \MYSDRAMCNT/counter_wait_18  (
    .D(\MYSDRAMCNT/counter_wait_inst_sum_18 ),
    .CE(\MYSDRAMCNT/counter_wait_inst_inv_1 ),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .PRE(sd_dqm_0_OBUF),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/counter_wait [18])
  );
  FDCPE \MYSDRAMCNT/counter_wait_19  (
    .D(\MYSDRAMCNT/counter_wait_inst_sum_19 ),
    .CE(\MYSDRAMCNT/counter_wait_inst_inv_1 ),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .PRE(sd_dqm_0_OBUF),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/counter_wait [19])
  );
  MUXCY \MYSDRAMCNT/counter_wait_inst_cy_0_37  (
    .CI(sd_dqm_0_OBUF),
    .DI(N0),
    .S(\MYSDRAMCNT/_n0018_rt ),
    .O(\MYSDRAMCNT/counter_wait_inst_cy_0 )
  );
  defparam \MYSDRAMCNT/burst_length_cntr_8_rt_38 .INIT = 4'h2;
  LUT1 \MYSDRAMCNT/burst_length_cntr_8_rt_38  (
    .I0(\MYSDRAMCNT/burst_length_cntr [8]),
    .O(\MYSDRAMCNT/burst_length_cntr_8_rt )
  );
  MUXCY \MYSDRAMCNT/counter_wait_inst_cy_1_39  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_0 ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/counter_wait_inst_lut3_0 ),
    .O(\MYSDRAMCNT/counter_wait_inst_cy_1 )
  );
  XORCY \MYSDRAMCNT/counter_wait_inst_sum_0_40  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_0 ),
    .LI(\MYSDRAMCNT/counter_wait_inst_lut3_0 ),
    .O(\MYSDRAMCNT/counter_wait_inst_sum_0 )
  );
  defparam \MYSDRAMCNT/counter_wait_inst_lut3_01 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/counter_wait_inst_lut3_01  (
    .I0(\MYSDRAMCNT/counter_wait [0]),
    .I1(\MYSDRAMCNT/_n0018 ),
    .LO(\MYSDRAMCNT/counter_wait_inst_lut3_0 )
  );
  MUXCY \MYSDRAMCNT/counter_wait_inst_cy_2_41  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_1 ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/counter_wait_inst_lut3_1 ),
    .O(\MYSDRAMCNT/counter_wait_inst_cy_2 )
  );
  XORCY \MYSDRAMCNT/counter_wait_inst_sum_1_42  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_1 ),
    .LI(\MYSDRAMCNT/counter_wait_inst_lut3_1 ),
    .O(\MYSDRAMCNT/counter_wait_inst_sum_1 )
  );
  defparam \MYSDRAMCNT/counter_wait_inst_lut3_110 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/counter_wait_inst_lut3_110  (
    .I0(\MYSDRAMCNT/counter_wait [1]),
    .I1(\MYSDRAMCNT/_n0018 ),
    .LO(\MYSDRAMCNT/counter_wait_inst_lut3_1 )
  );
  MUXCY \MYSDRAMCNT/counter_wait_inst_cy_3_43  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_2 ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/counter_wait_inst_lut3_2 ),
    .O(\MYSDRAMCNT/counter_wait_inst_cy_3 )
  );
  XORCY \MYSDRAMCNT/counter_wait_inst_sum_2_44  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_2 ),
    .LI(\MYSDRAMCNT/counter_wait_inst_lut3_2 ),
    .O(\MYSDRAMCNT/counter_wait_inst_sum_2 )
  );
  defparam \MYSDRAMCNT/counter_wait_inst_lut3_21 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/counter_wait_inst_lut3_21  (
    .I0(\MYSDRAMCNT/counter_wait [2]),
    .I1(\MYSDRAMCNT/_n0018 ),
    .LO(\MYSDRAMCNT/counter_wait_inst_lut3_2 )
  );
  MUXCY \MYSDRAMCNT/counter_wait_inst_cy_4_45  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_3 ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/counter_wait_inst_lut3_3 ),
    .O(\MYSDRAMCNT/counter_wait_inst_cy_4 )
  );
  XORCY \MYSDRAMCNT/counter_wait_inst_sum_3_46  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_3 ),
    .LI(\MYSDRAMCNT/counter_wait_inst_lut3_3 ),
    .O(\MYSDRAMCNT/counter_wait_inst_sum_3 )
  );
  defparam \MYSDRAMCNT/counter_wait_inst_lut3_31 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/counter_wait_inst_lut3_31  (
    .I0(\MYSDRAMCNT/counter_wait [3]),
    .I1(\MYSDRAMCNT/_n0018 ),
    .LO(\MYSDRAMCNT/counter_wait_inst_lut3_3 )
  );
  MUXCY \MYSDRAMCNT/counter_wait_inst_cy_5_47  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_4 ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/counter_wait_inst_lut3_4 ),
    .O(\MYSDRAMCNT/counter_wait_inst_cy_5 )
  );
  XORCY \MYSDRAMCNT/counter_wait_inst_sum_4_48  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_4 ),
    .LI(\MYSDRAMCNT/counter_wait_inst_lut3_4 ),
    .O(\MYSDRAMCNT/counter_wait_inst_sum_4 )
  );
  defparam \MYSDRAMCNT/counter_wait_inst_lut3_41 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/counter_wait_inst_lut3_41  (
    .I0(\MYSDRAMCNT/counter_wait [4]),
    .I1(\MYSDRAMCNT/_n0018 ),
    .LO(\MYSDRAMCNT/counter_wait_inst_lut3_4 )
  );
  MUXCY \MYSDRAMCNT/counter_wait_inst_cy_6_49  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_5 ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/counter_wait_inst_lut3_5 ),
    .O(\MYSDRAMCNT/counter_wait_inst_cy_6 )
  );
  XORCY \MYSDRAMCNT/counter_wait_inst_sum_5_50  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_5 ),
    .LI(\MYSDRAMCNT/counter_wait_inst_lut3_5 ),
    .O(\MYSDRAMCNT/counter_wait_inst_sum_5 )
  );
  defparam \MYSDRAMCNT/counter_wait_inst_lut3_51 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/counter_wait_inst_lut3_51  (
    .I0(\MYSDRAMCNT/counter_wait [5]),
    .I1(\MYSDRAMCNT/_n0018 ),
    .LO(\MYSDRAMCNT/counter_wait_inst_lut3_5 )
  );
  MUXCY \MYSDRAMCNT/counter_wait_inst_cy_7_51  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_6 ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/counter_wait_inst_lut3_6 ),
    .O(\MYSDRAMCNT/counter_wait_inst_cy_7 )
  );
  XORCY \MYSDRAMCNT/counter_wait_inst_sum_6_52  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_6 ),
    .LI(\MYSDRAMCNT/counter_wait_inst_lut3_6 ),
    .O(\MYSDRAMCNT/counter_wait_inst_sum_6 )
  );
  defparam \MYSDRAMCNT/counter_wait_inst_lut3_61 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/counter_wait_inst_lut3_61  (
    .I0(\MYSDRAMCNT/counter_wait [6]),
    .I1(\MYSDRAMCNT/_n0018 ),
    .LO(\MYSDRAMCNT/counter_wait_inst_lut3_6 )
  );
  MUXCY \MYSDRAMCNT/counter_wait_inst_cy_8_53  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_7 ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/counter_wait_inst_lut3_7 ),
    .O(\MYSDRAMCNT/counter_wait_inst_cy_8 )
  );
  XORCY \MYSDRAMCNT/counter_wait_inst_sum_7_54  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_7 ),
    .LI(\MYSDRAMCNT/counter_wait_inst_lut3_7 ),
    .O(\MYSDRAMCNT/counter_wait_inst_sum_7 )
  );
  defparam \MYSDRAMCNT/counter_wait_inst_lut3_71 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/counter_wait_inst_lut3_71  (
    .I0(\MYSDRAMCNT/counter_wait [7]),
    .I1(\MYSDRAMCNT/_n0018 ),
    .LO(\MYSDRAMCNT/counter_wait_inst_lut3_7 )
  );
  MUXCY \MYSDRAMCNT/counter_wait_inst_cy_9_55  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_8 ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/counter_wait_inst_lut3_8 ),
    .O(\MYSDRAMCNT/counter_wait_inst_cy_9 )
  );
  XORCY \MYSDRAMCNT/counter_wait_inst_sum_8_56  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_8 ),
    .LI(\MYSDRAMCNT/counter_wait_inst_lut3_8 ),
    .O(\MYSDRAMCNT/counter_wait_inst_sum_8 )
  );
  defparam \MYSDRAMCNT/_n0002<3>106 .INIT = 16'hFF10;
  LUT4_L \MYSDRAMCNT/_n0002<3>106  (
    .I0(\MYSDRAMCNT/next_state [4]),
    .I1(\MYSDRAMCNT/N76 ),
    .I2(CHOICE2006),
    .I3(\MYSDRAMCNT/N39 ),
    .LO(CHOICE2008)
  );
  MUXCY \MYSDRAMCNT/counter_wait_inst_cy_10_57  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_9 ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/counter_wait_inst_lut3_9 ),
    .O(\MYSDRAMCNT/counter_wait_inst_cy_10 )
  );
  XORCY \MYSDRAMCNT/counter_wait_inst_sum_9_58  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_9 ),
    .LI(\MYSDRAMCNT/counter_wait_inst_lut3_9 ),
    .O(\MYSDRAMCNT/counter_wait_inst_sum_9 )
  );
  defparam \MYSDRAMCNT/counter_wait_inst_lut3_91 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/counter_wait_inst_lut3_91  (
    .I0(\MYSDRAMCNT/counter_wait [9]),
    .I1(\MYSDRAMCNT/_n0018 ),
    .LO(\MYSDRAMCNT/counter_wait_inst_lut3_9 )
  );
  MUXCY \MYSDRAMCNT/counter_wait_inst_cy_11_59  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_10 ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/counter_wait_inst_lut3_10 ),
    .O(\MYSDRAMCNT/counter_wait_inst_cy_11 )
  );
  XORCY \MYSDRAMCNT/counter_wait_inst_sum_10_60  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_10 ),
    .LI(\MYSDRAMCNT/counter_wait_inst_lut3_10 ),
    .O(\MYSDRAMCNT/counter_wait_inst_sum_10 )
  );
  defparam \MYSDRAMCNT/counter_wait_inst_lut3_101 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/counter_wait_inst_lut3_101  (
    .I0(\MYSDRAMCNT/counter_wait [10]),
    .I1(\MYSDRAMCNT/_n0018 ),
    .LO(\MYSDRAMCNT/counter_wait_inst_lut3_10 )
  );
  defparam \MYSDRAMCNT/_n0002<1> .INIT = 16'hFAD8;
  LUT4_D \MYSDRAMCNT/_n0002<1>  (
    .I0(\MYSDRAMCNT/next_state [3]),
    .I1(\MYSDRAMCNT/_n0029 ),
    .I2(N12),
    .I3(N13),
    .LO(N929),
    .O(\MYSDRAMCNT/_n0002 [1])
  );
  defparam \MYSDRAMCNT/_n0002<2>108 .INIT = 16'hF5F4;
  LUT4_L \MYSDRAMCNT/_n0002<2>108  (
    .I0(\MYSDRAMCNT/next_state [3]),
    .I1(CHOICE1955),
    .I2(CHOICE1981),
    .I3(CHOICE1967),
    .LO(\MYSDRAMCNT/_n0002 [2])
  );
  defparam \MYSDRAMCNT/Ker21 .INIT = 16'hFDFB;
  LUT4_D \MYSDRAMCNT/Ker21  (
    .I0(\MYSDRAMCNT/pwrup ),
    .I1(\MYSDRAMCNT/refresh_cntr [0]),
    .I2(\MYSDRAMCNT/N22 ),
    .I3(\MYSDRAMCNT/refresh_cntr [1]),
    .LO(N930),
    .O(\MYSDRAMCNT/N2 )
  );
  defparam \MYSDRAMCNT/_n0002<3>114 .INIT = 16'hFAF8;
  LUT4_L \MYSDRAMCNT/_n0002<3>114  (
    .I0(\MYSDRAMCNT/next_state [1]),
    .I1(CHOICE1985),
    .I2(CHOICE2008),
    .I3(CHOICE1998),
    .LO(\MYSDRAMCNT/_n0002 [3])
  );
  defparam \MYSDRAMCNT/_n0010<0>40 .INIT = 16'hCD01;
  LUT4_L \MYSDRAMCNT/_n0010<0>40  (
    .I0(\MYSDRAMCNT/next_state [4]),
    .I1(\MYSDRAMCNT/sd_addx_mux [0]),
    .I2(N914),
    .I3(N900),
    .LO(\MYSDRAMCNT/_n0010 [0])
  );
  defparam \MYSDRAMCNT/Ker391 .INIT = 16'h0020;
  LUT4 \MYSDRAMCNT/Ker391  (
    .I0(\MYSDRAMCNT/next_state [0]),
    .I1(\MYSDRAMCNT/next_state [2]),
    .I2(N928),
    .I3(\MYSDRAMCNT/_n0029 ),
    .O(\MYSDRAMCNT/N39 )
  );
  defparam \MYSDRAMCNT/_n0005_61 .INIT = 16'hCD01;
  LUT4_L \MYSDRAMCNT/_n0005_61  (
    .I0(\MYSDRAMCNT/next_state [4]),
    .I1(\MYSDRAMCNT/pwrup ),
    .I2(N916),
    .I3(N903),
    .LO(\MYSDRAMCNT/_n0005 )
  );
  defparam \MYSDRAMCNT/Ker701 .INIT = 16'hFFEF;
  LUT4_D \MYSDRAMCNT/Ker701  (
    .I0(\MYSDRAMCNT/autorefresh_cntr [3]),
    .I1(\MYSDRAMCNT/autorefresh_cntr [1]),
    .I2(\MYSDRAMCNT/autorefresh_cntr [2]),
    .I3(\MYSDRAMCNT/autorefresh_cntr [0]),
    .LO(N931),
    .O(\MYSDRAMCNT/N70 )
  );
  defparam \MYSDRAMCNT/_n0010<1>_SW0 .INIT = 16'hE88D;
  LUT4 \MYSDRAMCNT/_n0010<1>_SW0  (
    .I0(\MYSDRAMCNT/next_state [3]),
    .I1(\MYSDRAMCNT/sd_addx_mux [1]),
    .I2(\MYSDRAMCNT/next_state [1]),
    .I3(\MYSDRAMCNT/next_state [2]),
    .O(N11)
  );
  defparam \MYSDRAMCNT/_n0020_SW0 .INIT = 4'hE;
  LUT2_L \MYSDRAMCNT/_n0020_SW0  (
    .I0(\MYSDRAMCNT/next_state_4_1 ),
    .I1(\MYSDRAMCNT/next_state [2]),
    .LO(N3)
  );
  defparam \MYSDRAMCNT/_n0005_SW0 .INIT = 16'hFFFE;
  LUT4 \MYSDRAMCNT/_n0005_SW0  (
    .I0(\MYSDRAMCNT/next_state [3]),
    .I1(\MYSDRAMCNT/next_state [2]),
    .I2(\MYSDRAMCNT/next_state [1]),
    .I3(\MYSDRAMCNT/next_state [0]),
    .O(N916)
  );
  defparam \MYSDRAMCNT/_n0005_SW3 .INIT = 8'hFB;
  LUT3_L \MYSDRAMCNT/_n0005_SW3  (
    .I0(\MYSDRAMCNT/N43 ),
    .I1(\MYSDRAMCNT/next_state [2]),
    .I2(\MYSDRAMCNT/next_state [0]),
    .LO(N903)
  );
  defparam \MYSDRAMCNT/_n0002<1>_SW0 .INIT = 16'hFA76;
  LUT4 \MYSDRAMCNT/_n0002<1>_SW0  (
    .I0(\MYSDRAMCNT/next_state [0]),
    .I1(\MYSDRAMCNT/next_state [1]),
    .I2(\MYSDRAMCNT/next_state [4]),
    .I3(\MYSDR