sdc_synthesis.v

高速AD采集卡应用程序及SDRAM控制器

    .CI(\MYSDRAMCNT/counter_wait_inst_cy_16 ),
    .LI(\MYSDRAMCNT/counter_wait_inst_lut3_16 ),
    .O(\MYSDRAMCNT/counter_wait_inst_sum_16 )
  );
  XORCY \MYSDRAMCNT/counter_wait_inst_sum_13_31  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_13 ),
    .LI(\MYSDRAMCNT/counter_wait_inst_lut3_13 ),
    .O(\MYSDRAMCNT/counter_wait_inst_sum_13 )
  );
  defparam \MYSDRAMCNT/Ker261 .INIT = 16'h0020;
  LUT4 \MYSDRAMCNT/Ker261  (
    .I0(\MYSDRAMCNT/next_state [0]),
    .I1(\MYSDRAMCNT/next_state [2]),
    .I2(\MYSDRAMCNT/next_state [3]),
    .I3(\MYSDRAMCNT/next_state [4]),
    .O(\MYSDRAMCNT/N26 )
  );
  defparam \MYSDRAMCNT/_n002917 .INIT = 16'h8000;
  LUT4 \MYSDRAMCNT/_n002917  (
    .I0(\MYSDRAMCNT/burst_length_cntr [2]),
    .I1(\MYSDRAMCNT/burst_length_cntr [1]),
    .I2(CHOICE1916),
    .I3(CHOICE1913),
    .O(\MYSDRAMCNT/_n0029 )
  );
  FDP \MYSDRAMCNT/sd_ras_l_32  (
    .D(\MYSDRAMCNT/_n0007 ),
    .PRE(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/sd_ras_l )
  );
  MUXCY \MYSDRAMCNT/counter_wait_inst_cy_12_33  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_11 ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/counter_wait_inst_lut3_11 ),
    .O(\MYSDRAMCNT/counter_wait_inst_cy_12 )
  );
  defparam \MYSDRAMCNT/_n0003_34 .INIT = 16'hFAF8;
  LUT4_L \MYSDRAMCNT/_n0003_34  (
    .I0(\MYSDRAMCNT/autorefresh_cntr_l ),
    .I1(\MYSDRAMCNT/N64 ),
    .I2(\MYSDRAMCNT/_n0020 ),
    .I3(\MYSDRAMCNT/N70 ),
    .LO(\MYSDRAMCNT/_n0003 )
  );
  FDCPE \MYSDRAMCNT/counter_wait_12  (
    .D(\MYSDRAMCNT/counter_wait_inst_sum_12 ),
    .CE(\MYSDRAMCNT/counter_wait_inst_inv_1 ),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .PRE(sd_dqm_0_OBUF),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/counter_wait [12])
  );
  defparam \MYSDRAMCNT/counter_wait_inst_lut3_111 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/counter_wait_inst_lut3_111  (
    .I0(\MYSDRAMCNT/counter_wait [11]),
    .I1(\MYSDRAMCNT/_n0018 ),
    .LO(\MYSDRAMCNT/counter_wait_inst_lut3_11 )
  );
  FDC \MYSDRAMCNT/burst_length_cntr_8  (
    .D(\MYSDRAMCNT/burst_length_cntr__n0000 [8]),
    .CLR(\MYSDRAMCNT/burst_length_cntr_0_N0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/burst_length_cntr [8])
  );
  XORCY \MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<8>_xor  (
    .CI(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<7>_cyo ),
    .LI(\MYSDRAMCNT/burst_length_cntr_8_rt ),
    .O(\MYSDRAMCNT/burst_length_cntr__n0000 [8])
  );
  defparam \MYSDRAMCNT/autorefresh_cntr_Madd__n0000_Mxor_Result<2>_Result1 .INIT = 8'h78;
  LUT3 \MYSDRAMCNT/autorefresh_cntr_Madd__n0000_Mxor_Result<2>_Result1  (
    .I0(\MYSDRAMCNT/autorefresh_cntr [0]),
    .I1(\MYSDRAMCNT/autorefresh_cntr [1]),
    .I2(\MYSDRAMCNT/autorefresh_cntr [2]),
    .O(\MYSDRAMCNT/autorefresh_cntr__n0000 [2])
  );
  FDC \MYSDRAMCNT/burst_length_cntr_0  (
    .D(\MYSDRAMCNT/N9 ),
    .CLR(\MYSDRAMCNT/burst_length_cntr_0_N0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/burst_length_cntr [0])
  );
  FDC \MYSDRAMCNT/burst_length_cntr_1  (
    .D(\MYSDRAMCNT/burst_length_cntr__n0000 [1]),
    .CLR(\MYSDRAMCNT/burst_length_cntr_0_N0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/burst_length_cntr [1])
  );
  FDC \MYSDRAMCNT/burst_length_cntr_2  (
    .D(\MYSDRAMCNT/burst_length_cntr__n0000 [2]),
    .CLR(\MYSDRAMCNT/burst_length_cntr_0_N0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/burst_length_cntr [2])
  );
  FDC \MYSDRAMCNT/burst_length_cntr_3  (
    .D(\MYSDRAMCNT/burst_length_cntr__n0000 [3]),
    .CLR(\MYSDRAMCNT/burst_length_cntr_0_N0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/burst_length_cntr [3])
  );
  FDC \MYSDRAMCNT/burst_length_cntr_4  (
    .D(\MYSDRAMCNT/burst_length_cntr__n0000 [4]),
    .CLR(\MYSDRAMCNT/burst_length_cntr_0_N0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/burst_length_cntr [4])
  );
  FDC \MYSDRAMCNT/burst_length_cntr_5  (
    .D(\MYSDRAMCNT/burst_length_cntr__n0000 [5]),
    .CLR(\MYSDRAMCNT/burst_length_cntr_0_N0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/burst_length_cntr [5])
  );
  FDC \MYSDRAMCNT/burst_length_cntr_6  (
    .D(\MYSDRAMCNT/burst_length_cntr__n0000 [6]),
    .CLR(\MYSDRAMCNT/burst_length_cntr_0_N0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/burst_length_cntr [6])
  );
  FDP \MYSDRAMCNT/sd_addx_mux_1  (
    .D(\MYSDRAMCNT/_n0010 [1]),
    .PRE(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/sd_addx_mux [1])
  );
  FDC \MYSDRAMCNT/sd_addx_mux_0  (
    .D(\MYSDRAMCNT/_n0010 [0]),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/sd_addx_mux [0])
  );
  FDCE \MYSDRAMCNT/refresh_cntr_1  (
    .D(\MYSDRAMCNT/refresh_cntr__n0000 [1]),
    .CE(\MYSDRAMCNT/_n0020 ),
    .CLR(\MYSDRAMCNT/refresh_cntr_0_N0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/refresh_cntr [1])
  );
  defparam \MYSDRAMCNT/sd_busy_l1 .INIT = 8'h01;
  LUT3 \MYSDRAMCNT/sd_busy_l1  (
    .I0(do_read_IBUF),
    .I1(do_write_IBUF),
    .I2(\MYSDRAMCNT/doing_refresh ),
    .O(sd_busy_l_OBUF)
  );
  INV \MYSDRAMCNT/refresh_cntr_Madd__n0000__n00031_INV_0  (
    .I(\MYSDRAMCNT/refresh_cntr [0]),
    .O(\MYSDRAMCNT/refresh_cntr__n0000 [0])
  );
  FDCE \MYSDRAMCNT/refresh_cntr_0  (
    .D(\MYSDRAMCNT/refresh_cntr__n0000 [0]),
    .CE(\MYSDRAMCNT/_n0020 ),
    .CLR(\MYSDRAMCNT/refresh_cntr_0_N0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/refresh_cntr [0])
  );
  FDC \MYSDRAMCNT/autorefresh_cntr_3  (
    .D(\MYSDRAMCNT/autorefresh_cntr__n0000 [3]),
    .CLR(\MYSDRAMCNT/autorefresh_cntr_0_N0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/autorefresh_cntr [3])
  );
  OBUF next_state_2_OBUF (
    .I(\MYSDRAMCNT/next_state [2]),
    .O(next_state[2])
  );
  INV \MYSDRAMCNT/refresh_state_Out01_INV_0  (
    .I(\MYSDRAMCNT/refresh_state_FFd1 ),
    .O(\MYSDRAMCNT/_n0001 )
  );
  FDC \MYSDRAMCNT/autorefresh_cntr_0  (
    .D(\MYSDRAMCNT/autorefresh_cntr__n0000 [0]),
    .CLR(\MYSDRAMCNT/autorefresh_cntr_0_N0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/autorefresh_cntr [0])
  );
  FDC \MYSDRAMCNT/autorefresh_cntr_1  (
    .D(\MYSDRAMCNT/autorefresh_cntr__n0000 [1]),
    .CLR(\MYSDRAMCNT/autorefresh_cntr_0_N0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/autorefresh_cntr [1])
  );
  FDC \MYSDRAMCNT/autorefresh_cntr_2  (
    .D(\MYSDRAMCNT/autorefresh_cntr__n0000 [2]),
    .CLR(\MYSDRAMCNT/autorefresh_cntr_0_N0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/autorefresh_cntr [2])
  );
  defparam \MYSDRAMCNT/burst_length_cntr_7_rt_35 .INIT = 4'h2;
  LUT1 \MYSDRAMCNT/burst_length_cntr_7_rt_35  (
    .I0(\MYSDRAMCNT/burst_length_cntr [7]),
    .O(\MYSDRAMCNT/burst_length_cntr_7_rt )
  );
  FDCPE \MYSDRAMCNT/counter_wait_13  (
    .D(\MYSDRAMCNT/counter_wait_inst_sum_13 ),
    .CE(\MYSDRAMCNT/counter_wait_inst_inv_1 ),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .PRE(sd_dqm_0_OBUF),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/counter_wait [13])
  );
  defparam \MYSDRAMCNT/_n01321 .INIT = 16'hFFFE;
  LUT4_L \MYSDRAMCNT/_n01321  (
    .I0(\MYSDRAMCNT/next_state_1_2 ),
    .I1(\MYSDRAMCNT/next_state [4]),
    .I2(\MYSDRAMCNT/next_state [3]),
    .I3(\MYSDRAMCNT/next_state [2]),
    .LO(\MYSDRAMCNT/N10 )
  );
  defparam \MYSDRAMCNT/refresh_timer_6_rt_36 .INIT = 4'h2;
  LUT1_L \MYSDRAMCNT/refresh_timer_6_rt_36  (
    .I0(\MYSDRAMCNT/refresh_timer [6]),
    .LO(\MYSDRAMCNT/refresh_timer_6_rt )
  );
  INV \MYSDRAMCNT/sdcnt__n0022<0>lut_INV_0  (
    .I(\MYSDRAMCNT/refresh_timer [0]),
    .O(\MYSDRAMCNT/N4 )
  );
  MUXCY \MYSDRAMCNT/sdcnt__n0022<0>cy  (
    .CI(sd_dqm_0_OBUF),
    .DI(N0),
    .S(\MYSDRAMCNT/N4 ),
    .O(\MYSDRAMCNT/sdcnt__n0022<0>_cyo )
  );
  OBUF next_state_0_OBUF (
    .I(\MYSDRAMCNT/next_state [0]),
    .O(next_state[0])
  );
  MUXCY \MYSDRAMCNT/sdcnt__n0022<1>cy  (
    .CI(\MYSDRAMCNT/sdcnt__n0022<0>_cyo ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/refresh_timer_1_rt ),
    .O(\MYSDRAMCNT/sdcnt__n0022<1>_cyo )
  );
  XORCY \MYSDRAMCNT/sdcnt__n0022<1>_xor  (
    .CI(\MYSDRAMCNT/sdcnt__n0022<0>_cyo ),
    .LI(\MYSDRAMCNT/refresh_timer_1_rt ),
    .O(\MYSDRAMCNT/_n0022 [1])
  );
  MUXCY \MYSDRAMCNT/sdcnt__n0022<2>cy  (
    .CI(\MYSDRAMCNT/sdcnt__n0022<1>_cyo ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/refresh_timer_2_rt ),
    .O(\MYSDRAMCNT/sdcnt__n0022<2>_cyo )
  );
  XORCY \MYSDRAMCNT/sdcnt__n0022<2>_xor  (
    .CI(\MYSDRAMCNT/sdcnt__n0022<1>_cyo ),
    .LI(\MYSDRAMCNT/refresh_timer_2_rt ),
    .O(\MYSDRAMCNT/_n0022 [2])
  );
  MUXCY \MYSDRAMCNT/sdcnt__n0022<3>cy  (
    .CI(\MYSDRAMCNT/sdcnt__n0022<2>_cyo ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/refresh_timer_3_rt ),
    .O(\MYSDRAMCNT/sdcnt__n0022<3>_cyo )
  );
  XORCY \MYSDRAMCNT/sdcnt__n0022<3>_xor  (
    .CI(\MYSDRAMCNT/sdcnt__n0022<2>_cyo ),
    .LI(\MYSDRAMCNT/refresh_timer_3_rt ),
    .O(\MYSDRAMCNT/_n0022 [3])
  );
  MUXCY \MYSDRAMCNT/sdcnt__n0022<4>cy  (
    .CI(\MYSDRAMCNT/sdcnt__n0022<3>_cyo ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/refresh_timer_4_rt ),
    .O(\MYSDRAMCNT/sdcnt__n0022<4>_cyo )
  );
  XORCY \MYSDRAMCNT/sdcnt__n0022<4>_xor  (
    .CI(\MYSDRAMCNT/sdcnt__n0022<3>_cyo ),
    .LI(\MYSDRAMCNT/refresh_timer_4_rt ),
    .O(\MYSDRAMCNT/_n0022 [4])
  );
  MUXCY \MYSDRAMCNT/sdcnt__n0022<5>cy  (
    .CI(\MYSDRAMCNT/sdcnt__n0022<4>_cyo ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/refresh_timer_5_rt ),
    .O(\MYSDRAMCNT/sdcnt__n0022<5>_cyo )
  );
  XORCY \MYSDRAMCNT/sdcnt__n0022<5>_xor  (
    .CI(\MYSDRAMCNT/sdcnt__n0022<4>_cyo ),
    .LI(\MYSDRAMCNT/refresh_timer_5_rt ),
    .O(\MYSDRAMCNT/_n0022 [5])
  );
  MUXCY \MYSDRAMCNT/sdcnt__n0022<6>cy  (
    .CI(\MYSDRAMCNT/sdcnt__n0022<5>_cyo ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/refresh_timer_6_rt ),
    .O(\MYSDRAMCNT/sdcnt__n0022<6>_cyo )
  );
  XORCY \MYSDRAMCNT/sdcnt__n0022<6>_xor  (
    .CI(\MYSDRAMCNT/sdcnt__n0022<5>_cyo ),
    .LI(\MYSDRAMCNT/refresh_timer_6_rt ),
    .O(\MYSDRAMCNT/_n0022 [6])
  );
  MUXCY \MYSDRAMCNT/sdcnt__n0022<7>cy  (
    .CI(\MYSDRAMCNT/sdcnt__n0022<6>_cyo ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/refresh_timer_7_rt ),
    .O(\MYSDRAMCNT/sdcnt__n0022<7>_cyo )
  );
  XORCY \MYSDRAMCNT/sdcnt__n0022<7>_xor  (
    .CI(\MYSDRAMCNT/sdcnt__n0022<6>_cyo ),
    .LI(\MYSDRAMCNT/refresh_timer_7_rt ),
    .O(\MYSDRAMCNT/_n0022 [7])
  );
  MUXCY \MYSDRAMCNT/sdcnt__n0022<8>cy  (
    .CI(\MYSDRAMCNT/sdcnt__n0022<7>_cyo ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/refresh_timer_8_rt ),
    .O(\MYSDRAMCNT/sdcnt__n0022<8>_cyo )
  );
  XORCY \MYSDRAMCNT/sdcnt__n0022<8>_xor  (
    .CI(\MYSDRAMCNT/sdcnt__n0022<7>_cyo ),
    .LI(\MYSDRAMCNT/refresh_timer_8_rt ),
    .O(\MYSDRAMCNT/_n0022 [8])
  );
  FDCPE \MYSDRAMCNT/counter_wait_16  (
    .D(\MYSDRAMCNT/counter_wait_inst_sum_16 ),
    .CE(\MYSDRAMCNT/counter_wait_inst_inv_1 ),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .PRE(sd_dqm_0_OBUF),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/counter_wait [16])
  );
  MUXCY \MYSDRAMCNT/Andcy  (
    .CI(N0),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/counter_wait_6_rt ),
    .O(\MYSDRAMCNT/And_cyo )
  );
  defparam \MYSDRAMCNT/norlut .INIT = 4'h1;
  LUT2_L \MYSDRAMCNT/norlut  (
    .I0(\MYSDRAMCNT/counter_wait [7]),
    .I1(\MYSDRAMCNT/counter_wait [8]),
    .LO(\MYSDRAMCNT/N5 )
  );
  MUXCY \MYSDRAMCNT/norcy  (
    .CI(\MYSDRAMCNT/And_cyo ),
    .DI(N0),
    .S(\MYSDRAMCNT/N5 ),
    .O(\MYSDRAMCNT/nor_cyo )
  );
  MUXCY \MYSDRAMCNT/Andcy_rn_0  (
    .CI(\MYSDRAMCNT/nor_cyo ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/counter_wait_9_rt ),
    .O(\MYSDRAMCNT/And_cyo1 )
  );
  defparam \MYSDRAMCNT/norlut1 .INIT = 16'h0001;
  LUT4_L \MYSDRAMCNT/norlut1  (
    .I0(\MYSDRAMCNT/counter_wait [10]),
    .I1(\MYSDRAMCNT/counter_wait [11]),
    .I2(\MYSDRAMCNT/counter_wait [12]),
    .I3(\MYSDRAMCNT/counter_wait [13]),
    .LO(\MYSDRAMCNT/N6 )
  );
  MUXCY \MYSDRAMCNT/norcy_rn_0  (
    .CI(\MYSDRAMCNT/And_cyo1 ),
    .DI(N0),
    .S(\MYSDRAMCNT/N6 ),
    .O(\MYSDRAMCNT/nor_cyo1 )
  );
  MUXCY \MYSDRAMCNT/Andcy_rn_1  (
    .CI(\MYSDRAMCNT/nor_cyo1 ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/counter_wait_14_rt ),
    .O(\MYSDRAMCNT/And_cyo2 )
  );
  INV \MYSDRAMCNT/norlut2_INV_0  (
    .I(\MYSDRAMCNT/counter_wait [15]),
    .O(\MYSDRAMCNT/N7 )
  );
  MUXCY \MYSDRAMCNT/norcy_rn_1  (
    .CI(\MYSDRAMCNT/And_cyo2 ),
    .DI(N0),
    .S(\MYSDRAMCNT/N7 ),
    .O(\MYSDRAMCNT/nor_cyo2 )
  );
  defparam \MYSDRAMCNT/Andlut .INIT = 16'h8000;
  LUT4_L \MYSDRAMCNT/Andlut  (
    .I0(\MYSDRAMCNT/counter_wait [16]),
    .I1(\MYSDRAMCNT/counter_wait [17]),
    .I2(\MYSDRAMCNT/counter_wait [18]),
    .I3(\MYSDRAMCNT/counter_wait [19]),
    .LO(\MYSDRAMCNT/N8 )
  );
  INV \MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<0>lut_INV_0  (
    .I(\MYSDRAMCNT/burst_length_cntr [0]),
    .O(\MYSDRAMCNT/N9 )
  );
  MUXCY \MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<0>cy  (
    .CI(sd_dqm_0_OBUF),
    .DI(N0),
    .S(\MYSDRAMCNT/N9 ),
    .O(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<0>_cyo )
  );
  OBUF next_state_1_OBUF (
    .I(\MYSDRAMCNT/next_state [1]),
    .O(next_state[1])
  );
  MUXCY \MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<1>cy  (
    .CI(\MYSDRAMCNT/sdcnt_burst_length_cntr__n0000<0>_cyo ),