sdc_synthesis.v

高速AD采集卡应用程序及SDRAM控制器

  defparam \sd_addx<2>1 .INIT = 16'h7564;
  LUT4 \sd_addx<2>1  (
    .I0(\MYSDRAMCNT/sd_addx_mux [0]),
    .I1(\MYSDRAMCNT/sd_addx_mux [1]),
    .I2(mp_addx_2_IBUF),
    .I3(mp_addx_10_IBUF),
    .O(sd_addx_2_OBUF)
  );
  defparam \sd_addx<3>1 .INIT = 16'h2320;
  LUT4 \sd_addx<3>1  (
    .I0(mp_addx_3_IBUF),
    .I1(\MYSDRAMCNT/sd_addx_mux [1]),
    .I2(\MYSDRAMCNT/sd_addx_mux [0]),
    .I3(mp_addx_11_IBUF),
    .O(sd_addx_3_OBUF)
  );
  defparam \sd_addx<4>1 .INIT = 16'h2320;
  LUT4 \sd_addx<4>1  (
    .I0(mp_addx_4_IBUF),
    .I1(\MYSDRAMCNT/sd_addx_mux [1]),
    .I2(\MYSDRAMCNT/sd_addx_mux [0]),
    .I3(mp_addx_12_IBUF),
    .O(sd_addx_4_OBUF)
  );
  defparam \sd_addx<5>1 .INIT = 16'h7564;
  LUT4 \sd_addx<5>1  (
    .I0(\MYSDRAMCNT/sd_addx_mux [0]),
    .I1(\MYSDRAMCNT/sd_addx_mux [1]),
    .I2(mp_addx_5_IBUF),
    .I3(mp_addx_13_IBUF),
    .O(sd_addx_5_OBUF)
  );
  defparam \sd_addx<6>1 .INIT = 16'h2320;
  LUT4 \sd_addx<6>1  (
    .I0(mp_addx_6_IBUF),
    .I1(\MYSDRAMCNT/sd_addx_mux [1]),
    .I2(\MYSDRAMCNT/sd_addx_mux [0]),
    .I3(mp_addx_14_IBUF),
    .O(sd_addx_6_OBUF)
  );
  defparam \sd_addx<7>1 .INIT = 16'h2320;
  LUT4 \sd_addx<7>1  (
    .I0(mp_addx_7_IBUF),
    .I1(\MYSDRAMCNT/sd_addx_mux [1]),
    .I2(\MYSDRAMCNT/sd_addx_mux [0]),
    .I3(mp_addx_15_IBUF),
    .O(sd_addx_7_OBUF)
  );
  defparam \sd_addx<8>1 .INIT = 8'h02;
  LUT3 \sd_addx<8>1  (
    .I0(mp_addx_16_IBUF),
    .I1(\MYSDRAMCNT/sd_addx_mux [0]),
    .I2(\MYSDRAMCNT/sd_addx_mux [1]),
    .O(sd_addx_8_OBUF)
  );
  defparam \sd_addx<9>1 .INIT = 8'h02;
  LUT3 \sd_addx<9>1  (
    .I0(mp_addx_17_IBUF),
    .I1(\MYSDRAMCNT/sd_addx_mux [0]),
    .I2(\MYSDRAMCNT/sd_addx_mux [1]),
    .O(sd_addx_9_OBUF)
  );
  defparam \sd_ba<0>1 .INIT = 4'h2;
  LUT2 \sd_ba<0>1  (
    .I0(mp_addx_19_IBUF),
    .I1(\MYSDRAMCNT/sd_addx_mux [1]),
    .O(sd_ba_0_OBUF)
  );
  defparam \sd_ba<1>1 .INIT = 4'h2;
  LUT2 \sd_ba<1>1  (
    .I0(mp_addx_20_IBUF),
    .I1(\MYSDRAMCNT/sd_addx_mux [1]),
    .O(sd_ba_1_OBUF)
  );
  defparam \sd_addx<10>1 .INIT = 8'h98;
  LUT3 \sd_addx<10>1  (
    .I0(\MYSDRAMCNT/sd_addx10_mux [1]),
    .I1(\MYSDRAMCNT/sd_addx10_mux [0]),
    .I2(mp_addx_18_IBUF),
    .O(sd_addx_10_OBUF)
  );
  defparam \sd_addx<0>1 .INIT = 16'h7564;
  LUT4 \sd_addx<0>1  (
    .I0(\MYSDRAMCNT/sd_addx_mux [0]),
    .I1(\MYSDRAMCNT/sd_addx_mux [1]),
    .I2(mp_addx_0_IBUF),
    .I3(mp_addx_8_IBUF),
    .O(sd_addx_0_OBUF)
  );
  defparam \MYSDRAMCNT/Ker431 .INIT = 8'hDF;
  LUT3 \MYSDRAMCNT/Ker431  (
    .I0(\MYSDRAMCNT/next_state [3]),
    .I1(\MYSDRAMCNT/next_state [4]),
    .I2(\MYSDRAMCNT/next_state [1]),
    .O(\MYSDRAMCNT/N43 )
  );
  defparam \MYSDRAMCNT/_n0021<5>1 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/_n0021<5>1  (
    .I0(\MYSDRAMCNT/_n0022 [5]),
    .I1(\MYSDRAMCNT/_n0077 ),
    .LO(\MYSDRAMCNT/_n0021 [5])
  );
  defparam \MYSDRAMCNT/_n0021<6>1 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/_n0021<6>1  (
    .I0(\MYSDRAMCNT/_n0022 [6]),
    .I1(\MYSDRAMCNT/_n0077 ),
    .LO(\MYSDRAMCNT/_n0021 [6])
  );
  defparam \MYSDRAMCNT/_n0021<7>1 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/_n0021<7>1  (
    .I0(\MYSDRAMCNT/_n0022 [7]),
    .I1(\MYSDRAMCNT/_n0077 ),
    .LO(\MYSDRAMCNT/_n0021 [7])
  );
  defparam \MYSDRAMCNT/_n0021<8>1 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/_n0021<8>1  (
    .I0(\MYSDRAMCNT/_n0022 [8]),
    .I1(\MYSDRAMCNT/_n0077 ),
    .LO(\MYSDRAMCNT/_n0021 [8])
  );
  defparam \MYSDRAMCNT/_n0021<9>1 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/_n0021<9>1  (
    .I0(\MYSDRAMCNT/_n0022 [9]),
    .I1(\MYSDRAMCNT/_n0077 ),
    .LO(\MYSDRAMCNT/_n0021 [9])
  );
  defparam \MYSDRAMCNT/counter_wait_6_rt_0 .INIT = 4'h2;
  LUT1_L \MYSDRAMCNT/counter_wait_6_rt_0  (
    .I0(\MYSDRAMCNT/counter_wait [6]),
    .LO(\MYSDRAMCNT/counter_wait_6_rt )
  );
  XORCY \MYSDRAMCNT/counter_wait_inst_sum_15_1  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_15 ),
    .LI(\MYSDRAMCNT/counter_wait_inst_lut3_15 ),
    .O(\MYSDRAMCNT/counter_wait_inst_sum_15 )
  );
  defparam \MYSDRAMCNT/_n0016_rn_31 .INIT = 8'hD8;
  LUT3_L \MYSDRAMCNT/_n0016_rn_31  (
    .I0(\MYSDRAMCNT/next_state [4]),
    .I1(\MYSDRAMCNT/_n0016_MUXF5 ),
    .I2(\MYSDRAMCNT/_n0016_MUXF6 ),
    .LO(\MYSDRAMCNT/_n0016 )
  );
  defparam \MYSDRAMCNT/_n001584 .INIT = 16'hFF01;
  LUT4_L \MYSDRAMCNT/_n001584  (
    .I0(\MYSDRAMCNT/next_state [2]),
    .I1(\MYSDRAMCNT/next_state [0]),
    .I2(N910),
    .I3(CHOICE1845),
    .LO(\MYSDRAMCNT/_n0015 )
  );
  FDCPE \MYSDRAMCNT/counter_wait_0  (
    .D(\MYSDRAMCNT/counter_wait_inst_sum_0 ),
    .CE(\MYSDRAMCNT/counter_wait_inst_inv_1 ),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .PRE(sd_dqm_0_OBUF),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/counter_wait [0])
  );
  MUXCY \MYSDRAMCNT/counter_wait_inst_cy_16_2  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_15 ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/counter_wait_inst_lut3_15 ),
    .O(\MYSDRAMCNT/counter_wait_inst_cy_16 )
  );
  defparam \MYSDRAMCNT/_n0002<3>24 .INIT = 4'h2;
  LUT2 \MYSDRAMCNT/_n0002<3>24  (
    .I0(\MYSDRAMCNT/next_state [3]),
    .I1(\MYSDRAMCNT/next_state [4]),
    .O(CHOICE1994)
  );
  MUXCY \MYSDRAMCNT/counter_wait_inst_cy_15_3  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_14 ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/counter_wait_inst_lut3_14 ),
    .O(\MYSDRAMCNT/counter_wait_inst_cy_15 )
  );
  defparam \MYSDRAMCNT/counter_wait_inst_lut3_141 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/counter_wait_inst_lut3_141  (
    .I0(\MYSDRAMCNT/counter_wait [14]),
    .I1(\MYSDRAMCNT/_n0018 ),
    .LO(\MYSDRAMCNT/counter_wait_inst_lut3_14 )
  );
  MUXCY \MYSDRAMCNT/counter_wait_inst_cy_18_4  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_17 ),
    .DI(sd_dqm_0_OBUF),
    .S(\MYSDRAMCNT/counter_wait_inst_lut3_17 ),
    .O(\MYSDRAMCNT/counter_wait_inst_cy_18 )
  );
  INV \MYSDRAMCNT/counter_wait_inst_inv_01_INV_0  (
    .I(sys_rst_l_IBUF),
    .O(\MYSDRAMCNT/counter_wait_inst_inv_0 )
  );
  defparam \MYSDRAMCNT/_n0011<0>20 .INIT = 16'hFF8A;
  LUT4 \MYSDRAMCNT/_n0011<0>20  (
    .I0(\MYSDRAMCNT/next_state [0]),
    .I1(\MYSDRAMCNT/next_state [2]),
    .I2(\MYSDRAMCNT/next_state [3]),
    .I3(CHOICE1781),
    .O(CHOICE1782)
  );
  MUXF6 \MYSDRAMCNT/_n0008_rn_1  (
    .I0(\MYSDRAMCNT/_n0008_MUXF5 ),
    .I1(N15),
    .S(\MYSDRAMCNT/next_state [4]),
    .O(\MYSDRAMCNT/_n0008 )
  );
  defparam \MYSDRAMCNT/refresh_timer_5_rt_5 .INIT = 4'h2;
  LUT1_L \MYSDRAMCNT/refresh_timer_5_rt_5  (
    .I0(\MYSDRAMCNT/refresh_timer [5]),
    .LO(\MYSDRAMCNT/refresh_timer_5_rt )
  );
  INV \MYSDRAMCNT/autorefresh_cntr_Madd__n0000__n00091_INV_0  (
    .I(\MYSDRAMCNT/autorefresh_cntr [0]),
    .O(\MYSDRAMCNT/autorefresh_cntr__n0000 [0])
  );
  INV \MYSDRAMCNT/autorefresh_cntr_Aclr_INV1_INV_0  (
    .I(\MYSDRAMCNT/autorefresh_cntr_l ),
    .O(\MYSDRAMCNT/autorefresh_cntr_0_N0 )
  );
  FDCE \MYSDRAMCNT/refresh_timer_4  (
    .D(\MYSDRAMCNT/_n0021 [4]),
    .CE(\MYSDRAMCNT/_n0001 ),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/refresh_timer [4])
  );
  defparam \MYSDRAMCNT/autorefresh_cntr_Madd__n0000_Mxor_Result<1>_Result1 .INIT = 4'h6;
  LUT2 \MYSDRAMCNT/autorefresh_cntr_Madd__n0000_Mxor_Result<1>_Result1  (
    .I0(\MYSDRAMCNT/autorefresh_cntr [0]),
    .I1(\MYSDRAMCNT/autorefresh_cntr [1]),
    .O(\MYSDRAMCNT/autorefresh_cntr__n0000 [1])
  );
  FDC \MYSDRAMCNT/next_state_4  (
    .D(N935),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/next_state [4])
  );
  FDC \MYSDRAMCNT/refresh_cntr_l_6  (
    .D(\MYSDRAMCNT/_n0004 ),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/refresh_cntr_l )
  );
  FDP \MYSDRAMCNT/pwrup_7  (
    .D(\MYSDRAMCNT/_n0005 ),
    .PRE(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/pwrup )
  );
  FDCE \MYSDRAMCNT/refresh_timer_3  (
    .D(\MYSDRAMCNT/_n0021 [3]),
    .CE(\MYSDRAMCNT/_n0001 ),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/refresh_timer [3])
  );
  defparam \MYSDRAMCNT/_n0021<1>1 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/_n0021<1>1  (
    .I0(\MYSDRAMCNT/_n0022 [1]),
    .I1(\MYSDRAMCNT/_n0077 ),
    .LO(\MYSDRAMCNT/_n0021 [1])
  );
  defparam \MYSDRAMCNT/_n0021<2>1 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/_n0021<2>1  (
    .I0(\MYSDRAMCNT/_n0022 [2]),
    .I1(\MYSDRAMCNT/_n0077 ),
    .LO(\MYSDRAMCNT/_n0021 [2])
  );
  defparam \MYSDRAMCNT/_n0021<3>1 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/_n0021<3>1  (
    .I0(\MYSDRAMCNT/_n0022 [3]),
    .I1(\MYSDRAMCNT/_n0077 ),
    .LO(\MYSDRAMCNT/_n0021 [3])
  );
  defparam \MYSDRAMCNT/_n0021<4>1 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/_n0021<4>1  (
    .I0(\MYSDRAMCNT/_n0022 [4]),
    .I1(\MYSDRAMCNT/_n0077 ),
    .LO(\MYSDRAMCNT/_n0021 [4])
  );
  FDCE \MYSDRAMCNT/refresh_timer_5  (
    .D(\MYSDRAMCNT/_n0021 [5]),
    .CE(\MYSDRAMCNT/_n0001 ),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/refresh_timer [5])
  );
  XORCY \MYSDRAMCNT/counter_wait_inst_sum_17_8  (
    .CI(\MYSDRAMCNT/counter_wait_inst_cy_17 ),
    .LI(\MYSDRAMCNT/counter_wait_inst_lut3_17 ),
    .O(\MYSDRAMCNT/counter_wait_inst_sum_17 )
  );
  FDC \MYSDRAMCNT/next_state_2  (
    .D(\MYSDRAMCNT/_n0002 [2]),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/next_state [2])
  );
  FDC \MYSDRAMCNT/next_state_1  (
    .D(N929),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/next_state [1])
  );
  FDC \MYSDRAMCNT/doing_precharge_9  (
    .D(\MYSDRAMCNT/_n0014 ),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/doing_precharge )
  );
  FDCPE \MYSDRAMCNT/counter_wait_2  (
    .D(\MYSDRAMCNT/counter_wait_inst_sum_2 ),
    .CE(\MYSDRAMCNT/counter_wait_inst_inv_1 ),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .PRE(sd_dqm_0_OBUF),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/counter_wait [2])
  );
  defparam \MYSDRAMCNT/_n00171 .INIT = 16'hFF8A;
  LUT4_L \MYSDRAMCNT/_n00171  (
    .I0(\MYSDRAMCNT/do_refresh_ack ),
    .I1(N934),
    .I2(\MYSDRAMCNT/N70 ),
    .I3(\MYSDRAMCNT/_n0020 ),
    .LO(\MYSDRAMCNT/_n0017 )
  );
  defparam \MYSDRAMCNT/Ker691 .INIT = 8'h10;
  LUT3_D \MYSDRAMCNT/Ker691  (
    .I0(\MYSDRAMCNT/next_state_1_1 ),
    .I1(\MYSDRAMCNT/next_state_4_1 ),
    .I2(\MYSDRAMCNT/next_state [3]),
    .LO(N928),
    .O(\MYSDRAMCNT/N69 )
  );
  FDC \MYSDRAMCNT/do_read_ack_10  (
    .D(\MYSDRAMCNT/_n0016 ),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/do_read_ack )
  );
  defparam \MYSDRAMCNT/_n000946_G .INIT = 16'hAA8A;
  LUT4_L \MYSDRAMCNT/_n000946_G  (
    .I0(\MYSDRAMCNT/sd_wr_ena ),
    .I1(\MYSDRAMCNT/next_state [2]),
    .I2(\MYSDRAMCNT/next_state [1]),
    .I3(\MYSDRAMCNT/N76 ),
    .LO(N921)
  );
  FDCE \MYSDRAMCNT/refresh_timer_2  (
    .D(\MYSDRAMCNT/_n0021 [2]),
    .CE(\MYSDRAMCNT/_n0001 ),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/refresh_timer [2])
  );
  defparam \MYSDRAMCNT/counter_wait_inst_lut3_131 .INIT = 4'h2;
  LUT2_L \MYSDRAMCNT/counter_wait_inst_lut3_131  (
    .I0(\MYSDRAMCNT/counter_wait [13]),
    .I1(\MYSDRAMCNT/_n0018 ),
    .LO(\MYSDRAMCNT/counter_wait_inst_lut3_13 )
  );
  FDC \MYSDRAMCNT/next_state_0  (
    .D(N936),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/next_state [0])
  );
  FDCPE \MYSDRAMCNT/counter_wait_10  (
    .D(\MYSDRAMCNT/counter_wait_inst_sum_10 ),
    .CE(\MYSDRAMCNT/counter_wait_inst_inv_1 ),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .PRE(sd_dqm_0_OBUF),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/counter_wait [10])
  );
  FDC \MYSDRAMCNT/refresh_state_FFd1_11  (
    .D(\MYSDRAMCNT/refresh_state_FFd1-In ),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/refresh_state_FFd1 )
  );
  XORCY \MYSDRAMCNT/sdcnt__n0022<9>_xor  (
    .CI(\MYSDRAMCNT/sdcnt__n0022<8>_cyo ),
    .LI(\MYSDRAMCNT/refresh_timer_9_rt ),
    .O(\MYSDRAMCNT/_n0022 [9])
  );
  FDCPE \MYSDRAMCNT/counter_wait_8  (
    .D(\MYSDRAMCNT/counter_wait_inst_sum_8 ),
    .CE(\MYSDRAMCNT/counter_wait_inst_inv_1 ),
    .CLR(\MYSDRAMCNT/counter_wait_inst_inv_0 ),
    .PRE(sd_dqm_0_OBUF),
    .C(sys_clk_BUFGP),
    .Q(\MYSDRAMCNT/counter_wait [8])
  );
  INV \MYSDRAMCNT/refresh_cntr_Aclr_INV1_INV_0  (
    .I(\MYSDRAMCNT/refresh_cntr_l ),
    .O(\MYSDRAMCNT/refresh_cntr_0_N0 )
  );
  FDCE \MYSDRAMCNT/refresh_timer_1  (
    .D(\MYSDRAMCNT/_n0021 [1]),