📄 mux21a.tan.qmsg
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.1 Build 163 10/28/2008 SJ Full Version " "Info: Version 8.1 Build 163 10/28/2008 SJ Full Version" { } { } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Mar 19 13:04:06 2009 " "Info: Processing started: Thu Mar 19 13:04:06 2009" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 0} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off mux21a -c mux21a " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off mux21a -c mux21a" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "2 2 " "Info: Parallel compilation is enabled and will use 2 of the 2 processors detected" { } { } 0 0 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "" 0 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" { } { } 0 0 "Started post-fitting delay annotation" 0 0 "" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" { } { } 0 0 "Delay annotation completed successfully" 0 0 "" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "b y 11.300 ns Longest " "Info: Longest tpd from source pin \"b\" to destination pin \"y\" is 11.300 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns b 1 PIN PIN_126 1 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_126; Fanout = 1; PIN Node = 'b'" { } { { "d:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { b } "NODE_NAME" } } { "mux21a.vhd" "" { Text "D:/VHDL/mux21/mux21a.vhd" 2 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.600 ns) + CELL(1.600 ns) 4.200 ns y~4 2 COMB LC5_C19 1 " "Info: 2: + IC(0.600 ns) + CELL(1.600 ns) = 4.200 ns; Loc. = LC5_C19; Fanout = 1; COMB Node = 'y~4'" { } { { "d:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "2.200 ns" { b y~4 } "NODE_NAME" } } { "mux21a.vhd" "" { Text "D:/VHDL/mux21/mux21a.vhd" 3 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.800 ns) + CELL(6.300 ns) 11.300 ns y 3 PIN PIN_51 0 " "Info: 3: + IC(0.800 ns) + CELL(6.300 ns) = 11.300 ns; Loc. = PIN_51; Fanout = 0; PIN Node = 'y'" { } { { "d:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "7.100 ns" { y~4 y } "NODE_NAME" } } { "mux21a.vhd" "" { Text "D:/VHDL/mux21/mux21a.vhd" 3 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "9.900 ns ( 87.61 % ) " "Info: Total cell delay = 9.900 ns ( 87.61 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.400 ns ( 12.39 % ) " "Info: Total interconnect delay = 1.400 ns ( 12.39 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0} } { { "d:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "11.300 ns" { b y~4 y } "NODE_NAME" } } { "d:/altera/81/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/81/quartus/bin/Technology_Viewer.qrui" "11.300 ns" { b {} b~out {} y~4 {} y {} } { 0.000ns 0.000ns 0.600ns 0.800ns } { 0.000ns 2.000ns 1.600ns 6.300ns } "" } } } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0 0}
{ "Info" "IQCU_PARALLEL_UNUSED" "" "Info: Parallel compilation was enabled but no parallel operations were performed" { } { } 0 0 "Parallel compilation was enabled but no parallel operations were performed" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "127 " "Info: Peak virtual memory: 127 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Thu Mar 19 13:04:07 2009 " "Info: Processing ended: Thu Mar 19 13:04:07 2009" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}
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