mux21a.vhd

来自「一个比较简单的2选1多路选择器」· VHDL 代码 · 共 12 行

entity mux21a is
  port ( a,b,s : in bit;
           y : out bit);
end entity mux21a;
architecture one of mux21a is
  begin
    process(a,b,s)
     begin
      if s='0' then y<=a; else y<=b;
      end if;
    end process;
end architecture one;