八位无符号乘法器.vhd

含有各类寄存器

--8-bit Unsigned Multiplier
library IEEE;
use IEEE.Std_logic_1164.all;
use IEEE.Std_logic_unsigned.all;
entity MUL8X8 is
    port(A, B : in Std_logic_vector(7 downto 0);
         PROD : out Std_logic_vector(15 downto 0));
end MUL8X8;
architecture SYNP of MUL8X8 is
begin
      PROD <= A * B;
end SYNP;