16bit数模转换器.vhd

来自「含有各类寄存器」· VHDL 代码 · 共 14 行

--16-bit Digital to Analogue Converter
USE WORK.rampac.ALL;
USE WORK.adcpac.ALL;
ENTITY dac16 IS
PORT(vout : INOUT analogue; digin : IN data16; --input and output
en : IN BIT); --latches in data
END dac16;
ARCHITECTURE behaviour OF dac16 IS
CONSTANT vlsb : analogue := (analogue'HIGH - analogue'LOW)/REAL(2*ABS(data16'LOW));
BEGIN
--store analogue equivalent of digin on vout when negative edge on en
vout <= REAL(digin)*vlsb WHEN (en'EVENT AND en = '0') ELSE vout;
END behaviour;