8-bit unipolar successive approximation adc.vhd

含有各类寄存器

--8-bit Unipolar Successive Approximation ADC
--8-bit unipolar successive approximation analogue to digital converter
--demonstrates use of LOOP and WAIT statements
ENTITY adcsc8 IS
PORT(vin : IN REAL RANGE 0.0 TO +5.0; --unipolar analogue input
digout : OUT BIT_VECTOR(7 DOWNTO 0); --digital output
clock, sc : IN BIT; busy : OUT BIT); --clock & control
END adcsc8;
ARCHITECTURE behaviour OF adcsc8 IS
SIGNAL v_estimate : REAL RANGE 0.0 TO +5.0;
BEGIN
PROCESS
CONSTANT v_lsb : REAL := 5.0/256; --least significant bit value
BEGIN
WAIT UNTIL (sc'EVENT AND sc = '0'); --falling edge on sc starts conv
v_estimate <= 0.0; --initialise v_estimate
digout <= "00000000"; --clear SAR register
busy <= '1'; --flag converter busy
FOR i IN digout'RANGE LOOP --loop for each output bit
WAIT UNTIL (clock'EVENT AND clock = '1');
v_estimate <= v_estimate + (REAL(2**i))*v_lsb;
digout(i) <= '1';
WAIT UNTIL (clock'EVENT AND clock = '1');
IF v_estimate >= vin THEN
v_estimate <= v_estimate - (REAL(2**i))*v_lsb;
digout(i) <= '0';
END IF;
END LOOP;
busy <= '0'; --flag end of conversion
END PROCESS;
END behaviour;