bcdto7seg.vhd

基于CPLD的4X4键盘输入+液晶显示程序

library ieee;
use ieee.std_logic_1164.all;

entity converter is
	port(
		db:in std_logic_vector(3 downto 0);
		seg:out std_logic_vector(6 downto 0)
		);
end converter;

architecture a of converter is
begin
	seg<= "0000001" when db="0000" else
		"1001111" when db="0001" else
		"0010010" when db="0010" else
		"0000110" when db="0011" else
		"1001100" when db="0100" else
		"0100100" when db="0101" else
		"0100000" when db="0110" else
		"0001111" when db="0111" else
		"0000000" when db="1000" else
		"0000100" when db="1001" else
		"0001000" when db="1010" else

		"1100000" when db="1011" else
		"0110001" when db="1100" else
		"1000010" when db="1101" else
		"0110000" when db="1110" else
		"0111000" when db="1111" else
		"1111111";
end a;