kit_de2.hif

VGA sourcecodes/documents

-1
3
rdaddress0
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
outclocken
-1
3
outclock
-1
3
inclock
-1
3
data7
-1
3
data6
-1
3
data5
-1
3
data4
-1
3
data3
-1
3
data2
-1
3
data1
-1
3
data0
-1
3
}
# hierarchies {
Khoi_FIFO:BLOCK_5|FIFO_Image:BLOCK_FIFO_0|scfifo:scfifo_component|scfifo_1eu:auto_generated|a_dpfifo_8ku:dpfifo|dpram_4it:FIFOram
Khoi_FIFO:BLOCK_5|FIFO_Image:BLOCK_FIFO_1|scfifo:scfifo_component|scfifo_1eu:auto_generated|a_dpfifo_8ku:dpfifo|dpram_4it:FIFOram
}
# end
# entity
altsyncram_6sj1
# storage
db|kit_DE2.(22).cnf
db|kit_DE2.(22).cnf
# case_insensitive
# source_file
db|altsyncram_6sj1.tdf
d293143793daca41b1cb4a7871d4ad7b
6
# user_parameter {
PORT_A_ADDRESS_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_A_BYTE_ENABLE_MASK_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_A_DATA_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_ADDRESS_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_BYTE_ENABLE_MASK_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_DATA_WIDTH
1
PARAMETER_UNKNOWN
DEF
}
# used_port {
wren_a
-1
3
q_b7
-1
3
q_b6
-1
3
q_b5
-1
3
q_b4
-1
3
q_b3
-1
3
q_b2
-1
3
q_b1
-1
3
q_b0
-1
3
data_a7
-1
3
data_a6
-1
3
data_a5
-1
3
data_a4
-1
3
data_a3
-1
3
data_a2
-1
3
data_a1
-1
3
data_a0
-1
3
clocken1
-1
3
clock1
-1
3
clock0
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b1
-1
3
address_b0
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# memory_file {
none
0
}
# hierarchies {
Khoi_FIFO:BLOCK_5|FIFO_Image:BLOCK_FIFO_0|scfifo:scfifo_component|scfifo_1eu:auto_generated|a_dpfifo_8ku:dpfifo|dpram_4it:FIFOram|altsyncram_6sj1:altsyncram2
Khoi_FIFO:BLOCK_5|FIFO_Image:BLOCK_FIFO_1|scfifo:scfifo_component|scfifo_1eu:auto_generated|a_dpfifo_8ku:dpfifo|dpram_4it:FIFOram|altsyncram_6sj1:altsyncram2
}
# end
# entity
cntr_el8
# storage
db|kit_DE2.(23).cnf
db|kit_DE2.(23).cnf
# case_insensitive
# source_file
db|cntr_el8.tdf
9791a323d46259332181e426a1dbffe
6
# used_port {
sclr
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
cnt_en
-1
3
clock
-1
3
aclr
-1
3
}
# hierarchies {
Khoi_FIFO:BLOCK_5|FIFO_Image:BLOCK_FIFO_0|scfifo:scfifo_component|scfifo_1eu:auto_generated|a_dpfifo_8ku:dpfifo|cntr_el8:rd_ptr_count
Khoi_FIFO:BLOCK_5|FIFO_Image:BLOCK_FIFO_0|scfifo:scfifo_component|scfifo_1eu:auto_generated|a_dpfifo_8ku:dpfifo|cntr_el8:wr_ptr
Khoi_FIFO:BLOCK_5|FIFO_Image:BLOCK_FIFO_1|scfifo:scfifo_component|scfifo_1eu:auto_generated|a_dpfifo_8ku:dpfifo|cntr_el8:rd_ptr_count
Khoi_FIFO:BLOCK_5|FIFO_Image:BLOCK_FIFO_1|scfifo:scfifo_component|scfifo_1eu:auto_generated|a_dpfifo_8ku:dpfifo|cntr_el8:wr_ptr
}
# end
# entity
kit_DE2
# storage
db|kit_DE2.(0).cnf
db|kit_DE2.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
kit_DE2.v
c22b7afc2cd1522fde2589edf06b5bd4
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
|
}
# end
# entity
async_receiver
# storage
db|kit_DE2.(1).cnf
db|kit_DE2.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
asyn_receiver.v
4993edd597ee6436c56728e68e506859
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ClkFrequency
25000000
PARAMETER_DEC
DEF
Baud
115200
PARAMETER_DEC
DEF
Baud8
921600
PARAMETER_DEC
DEF
Baud8GeneratorAccWidth
16
PARAMETER_DEC
DEF
}
# hierarchies {
async_receiver:BLOCK1
}
# end
# entity
control_wr_rd_for_SRAM
# storage
db|kit_DE2.(13).cnf
db|kit_DE2.(13).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
control_wr_rd_for_SRAM.v
1a93e83bf4998a3705541782023e0a1
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
Wait_buffer_Low
00
PARAMETER_BIN
DEF
Buffer_data_Low_full
01
PARAMETER_BIN
DEF
Wait_buffer_High
10
PARAMETER_BIN
DEF
Buffer_data_High_full
11
PARAMETER_BIN
DEF
}
# hierarchies {
control_wr_rd_for_SRAM:BLOCK4
}
# end
# entity
Khoi_FIFO
# storage
db|kit_DE2.(14).cnf
db|kit_DE2.(14).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
Khoi_FIFO.v
b687c7da984b9f20cfd66ae95b5256cb
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
Khoi_FIFO:BLOCK_5
}
# end
# entity
Processing_image_1
# storage
db|kit_DE2.(26).cnf
db|kit_DE2.(26).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
Processing_image_1.v
1712fe95dc24f2ecf0a3bfda43548b
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
Processing_image:BLOCK_6|Processing_image_1:BLOCK_Processing_1
}
# end
# entity
altsyncram
# storage
db|kit_DE2.(4).cnf
db|kit_DE2.(4).cnf
# case_insensitive
# source_file
e:|chuong_trinh|quartusii|libraries|megafunctions|altsyncram.tdf
c9a54fc8e33741c15b27e3d74d615aff
6
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
OPERATION_MODE
SINGLE_PORT
PARAMETER_UNKNOWN
USR
WIDTH_A
8
PARAMETER_DEC
USR
WIDTHAD_A
14
PARAMETER_DEC
USR
NUMWORDS_A
16384
PARAMETER_DEC
USR
OUTDATA_REG_A
CLOCK0
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_B
1
PARAMETER_UNKNOWN
DEF
WIDTHAD_B
1
PARAMETER_UNKNOWN
DEF
NUMWORDS_B
1
PARAMETER_UNKNOWN
DEF
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
DEF
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_A
1
PARAMETER_DEC
USR
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
DEF
BYTE_SIZE
8
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
DEF
INIT_FILE
copy_lena_3.hex
PARAMETER_UNKNOWN
USR
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
DEF
MAXIMUM_DEPTH
0
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_A
BYPASS
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_A
BYPASS
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_4qc1
PARAMETER_UNKNOWN
USR
}
# used_port {
wren_a
-1
3
q_a
-1
3
data_a
-1
3
clock0
-1
3
address_a
-1
3
wren_b
-1
1
addressstall_b
-1
1
addressstall_a
-1
1
aclr1
-1
1
aclr0
-1
1
rden_b
-1
2
data_b
-1
2
clocken1
-1
2
clocken0
-1
2
clock1
-1
2
byteena_b
-1
2
byteena_a
-1
2
address_b
-1
2
}
# include_file {
e:|chuong_trinh|quartusii|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
e:|chuong_trinh|quartusii|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
e:|chuong_trinh|quartusii|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
e:|chuong_trinh|quartusii|libraries|megafunctions|aglobal60.inc
b3d07c643dae10ab2b3e646e99ec45fc
e:|chuong_trinh|quartusii|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
e:|chuong_trinh|quartusii|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
e:|chuong_trinh|quartusii|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
e:|chuong_trinh|quartusii|libraries|megafunctions|altsyncram.inc
2d485e3cf75d4048974bdbf0d920cb89
e:|chuong_trinh|quartusii|libraries|megafunctions|altdpram.inc
4e1931f9814db9f22f22b9eb377c65d6
e:|chuong_trinh|quartusii|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
}
# hierarchies {
vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component
}
# end
# entity
scfifo
# storage
db|kit_DE2.(16).cnf
db|kit_DE2.(16).cnf
# case_insensitive
# source_file
e:|chuong_trinh|quartusii|libraries|megafunctions|scfifo.tdf
b67e14bc943b20b2659e8ef1077457
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
lpm_width
8
PARAMETER_DEC
USR
LPM_NUMWORDS
128
PARAMETER_DEC
USR
LPM_WIDTHU
7
PARAMETER_DEC
USR
LPM_SHOWAHEAD
OFF
PARAMETER_UNKNOWN
USR
UNDERFLOW_CHECKING
ON
PARAMETER_UNKNOWN
USR
OVERFLOW_CHECKING
ON
PARAMETER_UNKNOWN
USR
ALLOW_RWCYCLE_WHEN_FULL
OFF
PARAMETER_UNKNOWN
DEF
ADD_RAM_OUTPUT_REGISTER
OFF
PARAMETER_UNKNOWN
USR
ALMOST_FULL_VALUE
0
PARAMETER_UNKNOWN
DEF
ALMOST_EMPTY_VALUE
0
PARAMETER_UNKNOWN
DEF
USE_EAB
ON
PARAMETER_UNKNOWN
USR
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
scfifo_1eu
PARAMETER_UNKNOWN
USR
}
# used_port {
wrreq
-1
3
rdreq
-1
3
q
-1
3
data
-1
3
clock
-1
3
}
# include_file {
e:|chuong_trinh|quartusii|libraries|megafunctions|aglobal60.inc
b3d07c643dae10ab2b3e646e99ec45fc
e:|chuong_trinh|quartusii|libraries|megafunctions|a_dpfifo.inc
748303753a041187a5d4113b5f62acf
e:|chuong_trinh|quartusii|libraries|megafunctions|a_regfifo.inc
afe6bfc54c15224ce61beaea9e71dc
e:|chuong_trinh|quartusii|libraries|megafunctions|a_i2fifo.inc
ca5bb76c5a51df22b24c8b01cbcc918
e:|chuong_trinh|quartusii|libraries|megafunctions|a_fffifo.inc
ebf62e69b8fb10b5db33a57861298d55
e:|chuong_trinh|quartusii|libraries|megafunctions|a_f2fifo.inc
9bc132bd4e9e2ef1fb9633f6a742f
}
# hierarchies {
Khoi_FIFO:BLOCK_5|FIFO_Image:BLOCK_FIFO_0|scfifo:scfifo_component
Khoi_FIFO:BLOCK_5|FIFO_Image:BLOCK_FIFO_1|scfifo:scfifo_component
}
# end
# entity
Processing_image
# storage
db|kit_DE2.(24).cnf
db|kit_DE2.(24).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
Processing_image.v
d0371752dd26d4a41a0e9ea43a47b2d
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
Processing_image:BLOCK_6
}
# end
# entity
Processing_image_0
# storage
db|kit_DE2.(25).cnf
db|kit_DE2.(25).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
Processing_image_0.v
69d658d31ae19515d2bc0b9a43e1
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
Processing_image:BLOCK_6|Processing_image_0:BLOCK_Processing_0
}
# end
# complete