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; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a6~porta_we_reg         ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.522 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a6~porta_datain_reg0    ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.521 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a6~porta_address_reg0   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.522 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a6~porta_address_reg1   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.522 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a6~porta_address_reg2   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.522 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a6~porta_address_reg3   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.522 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a6~porta_address_reg4   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.522 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a6~porta_address_reg5   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.522 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a6~porta_address_reg6   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.522 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a6~porta_address_reg7   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.522 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a6~porta_address_reg8   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.522 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a6~porta_address_reg9   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.522 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a6~porta_address_reg10  ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.522 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a6~porta_address_reg11  ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.522 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a4~porta_we_reg         ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.505 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a4~porta_datain_reg0    ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.504 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a4~porta_address_reg0   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.505 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a4~porta_address_reg1   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.505 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a4~porta_address_reg2   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.505 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a4~porta_address_reg3   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.505 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a4~porta_address_reg4   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.505 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a4~porta_address_reg5   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.505 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a4~porta_address_reg6   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.505 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a4~porta_address_reg7   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.505 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a4~porta_address_reg8   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.505 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a4~porta_address_reg9   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.505 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a4~porta_address_reg10  ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.505 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[12]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a4~porta_address_reg11  ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.505 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|D_FFs:C14|out          ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a11~porta_we_reg        ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.471 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[13]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a11~porta_we_reg        ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.471 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|D_FFs:C14|out          ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a11~porta_datain_reg0   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.470 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[13]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a11~porta_datain_reg0   ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.470 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|D_FFs:C14|out          ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a11~porta_address_reg0  ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.471 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[13]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a11~porta_address_reg0  ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.471 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|D_FFs:C14|out          ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a11~porta_address_reg1  ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.471 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[13]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a11~porta_address_reg1  ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.471 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|D_FFs:C14|out          ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a11~porta_address_reg2  ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.471 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[13]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a11~porta_address_reg2  ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.471 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|D_FFs:C14|out          ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a11~porta_address_reg3  ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.471 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[13]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a11~porta_address_reg3  ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.471 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|D_FFs:C14|out          ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a11~porta_address_reg4  ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.471 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[13]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a11~porta_address_reg4  ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.471 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|D_FFs:C14|out          ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a11~porta_address_reg5  ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.471 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[13]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a11~porta_address_reg5  ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.471 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|D_FFs:C14|out          ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a11~porta_address_reg6  ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.471 ns                ;
; N/A                                     ; Restricted to 200.00 MHz ( period = 5.000 ns )      ; control_wr_rd_for_SRAM:BLOCK4|wr_address[13]         ; vga_controller:BLOCK2|ram_vga:VGA_khoi1|altsyncram:altsyncram_component|altsyncram_4qc1:auto_generated|ram_block1a11~porta_address_reg6  ; CLOCK_50   ; CLOCK_50 ; None                        ; None                      ; 4.471 ns                ;
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