sms4_top.v

Verilog实现的SMS4

module   SMS4_Top(
                   clk              ,
                   rst_n            , 
		                     
		   SMS4_sw_rst      ,
		   
		   SMS4_DataIn      ,		   
		   SMS4_load_key    ,
		   SMS4_load_data   ,		   
		  
		   SMS4_encrypt_start,
		   SMS4_decrypt_start,		   
		   
		  
		   SMS4_ready,
		   SMS4_DataOut
		   
		   
				);         
                  
input               clk;
input               rst_n;     

input         SMS4_sw_rst;

input  [31:0 ]SMS4_DataIn;

input         SMS4_load_key;
input         SMS4_load_data;


input         SMS4_encrypt_start;
input         SMS4_decrypt_start;



output         SMS4_ready;
output  [127:0] SMS4_DataOut;




wire [127:0] data_reg;
wire [127:0] secret_reg;



SMS4_DataIO        U_SMS4_DataIO (
			.clk         (clk        )  ,    
			.rst_n           (rst_n          )  ,    
			
			.SMS4_sw_rst(SMS4_sw_rst),
			
			.SMS4_DataIn(SMS4_DataIn),
			
			.SMS4_load_key(SMS4_load_key),
			.SMS4_load_data(SMS4_load_data),
			

                        .SMS4_encrypt_start(SMS4_encrypt_start),
			.SMS4_decrypt_start(SMS4_decrypt_start),
			
			
			
			.secret_update_clr (secret_update_clr),	
			.SMS4_ready     (SMS4_ready      ), 

				
			.secret_reg	(secret_reg	),
			.data_reg	(data_reg	),
			
			
			.start_pulse     	(start_pulse    )  ,
			.logic_start     (logic_start    )  ,
			.secret_update (secret_update)                	
			//.indicator	(indicator	)
			
			); 
                             

SMS4_Cal         U_SMS4_Cal (
			.clk        (clk         ) ,    
			.rst_n          (rst_n           ) ,
			
			.SMS4_sw_rst(SMS4_sw_rst),	
			
			
			.start_pulse     	(start_pulse    )  ,
			.logic_start    (logic_start     ) ,
			//.indicator	(indicator	),
			.SMS4_encrypt_start(SMS4_encrypt_start),
			.secret_update (secret_update),	
			
			.secret_update_clr (secret_update_clr),

			.secret_reg	(secret_reg	),
			.data_reg	(data_reg	),
			
			.SMS4_DataOut(SMS4_DataOut),
			
			.SMS4_ready     (SMS4_ready      )
			);
                             
endmodule