lcd12864.map.rpt

FPGA驱动LCD12864显示

; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                    ;
; WIDTH_BYTEENA_A                    ; 1                    ; Signed Integer             ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                    ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                    ;
; BYTE_SIZE                          ; 8                    ; Untyped                    ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                    ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                    ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                    ;
; INIT_FILE                          ; char.hex             ; Untyped                    ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                    ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                    ;
; CLOCK_ENABLE_INPUT_A               ; BYPASS               ; Untyped                    ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                    ;
; CLOCK_ENABLE_OUTPUT_A              ; BYPASS               ; Untyped                    ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                    ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                    ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                    ;
; ENABLE_ECC                         ; FALSE                ; Untyped                    ;
; DEVICE_FAMILY                      ; Cyclone II           ; Untyped                    ;
; CBXI_PARAMETER                     ; altsyncram_ov61      ; Untyped                    ;
+------------------------------------+----------------------+----------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 8.0 Build 231 07/10/2008 Service Pack 1 SJ Full Version
    Info: Processing started: Sat Dec 06 14:24:24 2008
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off LCD12864 -c LCD12864
Info: Found 1 design units, including 1 entities, in source file LCD12864.bdf
    Info: Found entity 1: LCD12864
Warning (10090): Verilog HDL syntax warning at newlcd.v(184): extra block comment delimiter characters /* within block comment
Info: Found 1 design units, including 1 entities, in source file newlcd.v
    Info: Found entity 1: newlcd
Info: Found 1 design units, including 1 entities, in source file rom.v
    Info: Found entity 1: rom
Info: Elaborating entity "LCD12864" for the top level hierarchy
Info: Elaborating entity "newlcd" for hierarchy "newlcd:inst"
Warning (10858): Verilog HDL warning at newlcd.v(44): object row_addr used but never assigned
Warning (10030): Net "row_addr[5]" at newlcd.v(44) has no driver or initial value, using a default initial value '0'
Warning (10030): Net "row_addr[4]" at newlcd.v(44) has no driver or initial value, using a default initial value '0'
Warning (10030): Net "row_addr[3]" at newlcd.v(44) has no driver or initial value, using a default initial value '0'
Warning (10030): Net "row_addr[2]" at newlcd.v(44) has no driver or initial value, using a default initial value '0'
Warning (10030): Net "row_addr[1]" at newlcd.v(44) has no driver or initial value, using a default initial value '0'
Warning (10030): Net "row_addr[0]" at newlcd.v(44) has no driver or initial value, using a default initial value '0'
Info: Elaborating entity "rom" for hierarchy "newlcd:inst|rom:rom"
Info: Elaborating entity "altsyncram" for hierarchy "newlcd:inst|rom:rom|altsyncram:altsyncram_component"
Info: Elaborated megafunction instantiation "newlcd:inst|rom:rom|altsyncram:altsyncram_component"
Info: Instantiated megafunction "newlcd:inst|rom:rom|altsyncram:altsyncram_component" with the following parameter:
    Info: Parameter "clock_enable_input_a" = "BYPASS"
    Info: Parameter "clock_enable_output_a" = "BYPASS"
    Info: Parameter "init_file" = "char.hex"
    Info: Parameter "intended_device_family" = "Cyclone II"
    Info: Parameter "lpm_hint" = "ENABLE_RUNTIME_MOD=NO"
    Info: Parameter "lpm_type" = "altsyncram"
    Info: Parameter "numwords_a" = "2048"
    Info: Parameter "operation_mode" = "ROM"
    Info: Parameter "outdata_aclr_a" = "NONE"
    Info: Parameter "outdata_reg_a" = "CLOCK0"
    Info: Parameter "widthad_a" = "11"
    Info: Parameter "width_a" = "8"
    Info: Parameter "width_byteena_a" = "1"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_ov61.tdf
    Info: Found entity 1: altsyncram_ov61
Info: Elaborating entity "altsyncram_ov61" for hierarchy "newlcd:inst|rom:rom|altsyncram:altsyncram_component|altsyncram_ov61:auto_generated"
Warning (12020): Port "address" on the entity instantiation of "rom" is connected to a signal of width 32. The formal width of the signal in the module is 11.  Extra bits will be ignored.
Warning: Synthesized away the following node(s):
    Warning: Synthesized away the following RAM node(s):
        Warning (14320): Synthesized away node "rom:inst1|altsyncram:altsyncram_component|altsyncram_ov61:auto_generated|q_a[0]"
        Warning (14320): Synthesized away node "rom:inst1|altsyncram:altsyncram_component|altsyncram_ov61:auto_generated|q_a[1]"
        Warning (14320): Synthesized away node "rom:inst1|altsyncram:altsyncram_component|altsyncram_ov61:auto_generated|q_a[2]"
        Warning (14320): Synthesized away node "rom:inst1|altsyncram:altsyncram_component|altsyncram_ov61:auto_generated|q_a[3]"
        Warning (14320): Synthesized away node "rom:inst1|altsyncram:altsyncram_component|altsyncram_ov61:auto_generated|q_a[4]"
        Warning (14320): Synthesized away node "rom:inst1|altsyncram:altsyncram_component|altsyncram_ov61:auto_generated|q_a[5]"
        Warning (14320): Synthesized away node "rom:inst1|altsyncram:altsyncram_component|altsyncram_ov61:auto_generated|q_a[6]"
        Warning (14320): Synthesized away node "rom:inst1|altsyncram:altsyncram_component|altsyncram_ov61:auto_generated|q_a[7]"
Info: Duplicate registers merged to single register
    Info (13360): Duplicate register "newlcd:inst|cs_r[0]" merged to single register "newlcd:inst|cs_r[1]", power-up level changed
Info: State machine "|LCD12864|newlcd:inst|state" contains 11 states
Info: Selected Auto state machine encoding method for state machine "|LCD12864|newlcd:inst|state"
Info: Encoding result for state machine "|LCD12864|newlcd:inst|state"
    Info: Completed encoding using 11 state bits
        Info: Encoded state bit "newlcd:inst|state.SETrow_addr_2"
        Info: Encoded state bit "newlcd:inst|state.SETrow_addr_1"
        Info: Encoded state bit "newlcd:inst|state.wr_data_2"
        Info: Encoded state bit "newlcd:inst|state.SETpage_addr_1"
        Info: Encoded state bit "newlcd:inst|state.setmode_2"
        Info: Encoded state bit "newlcd:inst|state.SETpage_addr_2"
        Info: Encoded state bit "newlcd:inst|state.wr_data_1"
        Info: Encoded state bit "newlcd:inst|state.setbase_2"
        Info: Encoded state bit "newlcd:inst|state.setmode_1"
        Info: Encoded state bit "newlcd:inst|state.setbase_1"
        Info: Encoded state bit "newlcd:inst|state.idle"
    Info: State "|LCD12864|newlcd:inst|state.idle" uses code string "00000000000"
    Info: State "|LCD12864|newlcd:inst|state.setbase_1" uses code string "00000000011"
    Info: State "|LCD12864|newlcd:inst|state.setmode_1" uses code string "00000000101"
    Info: State "|LCD12864|newlcd:inst|state.setbase_2" uses code string "00000001001"
    Info: State "|LCD12864|newlcd:inst|state.wr_data_1" uses code string "00000010001"
    Info: State "|LCD12864|newlcd:inst|state.SETpage_addr_2" uses code string "00000100001"
    Info: State "|LCD12864|newlcd:inst|state.setmode_2" uses code string "00001000001"
    Info: State "|LCD12864|newlcd:inst|state.SETpage_addr_1" uses code string "00010000001"
    Info: State "|LCD12864|newlcd:inst|state.wr_data_2" uses code string "00100000001"
    Info: State "|LCD12864|newlcd:inst|state.SETrow_addr_1" uses code string "01000000001"
    Info: State "|LCD12864|newlcd:inst|state.SETrow_addr_2" uses code string "10000000001"
Warning: Output pins are stuck at VCC or GND
    Warning (13410): Pin "FLASH_CE" is stuck at VCC
    Warning (13410): Pin "rtl8019_cs" is stuck at VCC
    Warning (13410): Pin "FLASH_ADDR0" is stuck at GND
Info: 9 registers lost all their fanouts during netlist optimizations. The first 9 are displayed below.
    Info: Register "newlcd:inst|state~121" lost all its fanouts during netlist optimizations.
    Info: Register "newlcd:inst|state~122" lost all its fanouts during netlist optimizations.
    Info: Register "newlcd:inst|state~123" lost all its fanouts during netlist optimizations.
    Info: Register "newlcd:inst|state~124" lost all its fanouts during netlist optimizations.
    Info: Register "newlcd:inst|div_cnt[16]" lost all its fanouts during netlist optimizations.
    Info: Register "newlcd:inst|div_cnt[17]" lost all its fanouts during netlist optimizations.
    Info: Register "newlcd:inst|div_cnt[18]" lost all its fanouts during netlist optimizations.
    Info: Register "newlcd:inst|div_cnt[19]" lost all its fanouts during netlist optimizations.
    Info: Register "newlcd:inst|div_cnt[20]" lost all its fanouts during netlist optimizations.
Info: Implemented 110 device resources after synthesis - the final resource count might be different
    Info: Implemented 2 input pins
    Info: Implemented 15 output pins
    Info: Implemented 85 logic cells
    Info: Implemented 8 RAM segments
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 23 warnings
    Info: Peak virtual memory: 164 megabytes
    Info: Processing ended: Sat Dec 06 14:24:27 2008
    Info: Elapsed time: 00:00:03
    Info: Total CPU time (on all processors): 00:00:02