lcd_1602.tan.summary

基于FPGA的LCD1602显示

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Timing Analyzer Summary
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Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 9.593 ns
From           : lcd:inst|clk_int
To             : lcd1602_e
From Clock     : clk
To Clock       : --
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : 210.39 MHz ( period = 4.753 ns )
From           : lcd:inst|div_reg[12]
To             : lcd:inst|div_reg[11]
From Clock     : clk
To Clock       : clk
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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