lcd_1602.map.rpt

基于FPGA的LCD1602显示

; Total fan-out                               ; 154   ;
; Average fan-out                             ; 2.37  ;
+---------------------------------------------+-------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                                                                         ;
+----------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+---------------------+--------------+
; Compilation Hierarchy Node ; LC Combinationals ; LC Registers ; Memory Bits ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name ; Library Name ;
+----------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+---------------------+--------------+
; |lcd_1602                  ; 27 (0)            ; 23 (0)       ; 0           ; 0            ; 0       ; 0         ; 15   ; 0            ; |lcd_1602           ; work         ;
;    |lcd:inst|              ; 27 (27)           ; 23 (23)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |lcd_1602|lcd:inst  ; work         ;
+----------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+---------------------+--------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


+---------------------------------------------------------------------------------+
; Registers Removed During Synthesis                                              ;
+----------------------------------------+----------------------------------------+
; Register name                          ; Reason for Removal                     ;
+----------------------------------------+----------------------------------------+
; lcd:inst|data[0]                       ; Stuck at VCC due to stuck port data_in ;
; lcd:inst|lcd_rs                        ; Stuck at VCC due to stuck port data_in ;
; lcd:inst|lcd_rw                        ; Stuck at GND due to stuck port data_in ;
; lcd:inst|data[7]                       ; Stuck at GND due to stuck port data_in ;
; lcd:inst|data[6]                       ; Stuck at VCC due to stuck port data_in ;
; lcd:inst|data[5]                       ; Stuck at GND due to stuck port data_in ;
; lcd:inst|data[4]                       ; Stuck at VCC due to stuck port data_in ;
; lcd:inst|data[3]                       ; Stuck at GND due to stuck port data_in ;
; lcd:inst|data[1..2]                    ; Stuck at VCC due to stuck port data_in ;
; Total Number of Removed Registers = 10 ;                                        ;
+----------------------------------------+----------------------------------------+


+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 23    ;
; Number of registers using Synchronous Clear  ; 21    ;
; Number of registers using Synchronous Load   ; 0     ;
; Number of registers using Asynchronous Clear ; 23    ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 0     ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+---------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: lcd:inst               ;
+----------------+----------------------------------+-----------------+
; Parameter Name ; Value                            ; Type            ;
+----------------+----------------------------------+-----------------+
; IDLE           ; 00000000000                      ; Unsigned Binary ;
; CLEAR          ; 00000000001                      ; Unsigned Binary ;
; RETURNCURSOR   ; 00000000010                      ; Unsigned Binary ;
; SETMODE        ; 00000000100                      ; Unsigned Binary ;
; SWITCHMODE     ; 00000001000                      ; Unsigned Binary ;
; SHIFT          ; 00000010000                      ; Unsigned Binary ;
; SETFUNCTION    ; 00000100000                      ; Unsigned Binary ;
; SETCGRAM       ; 00001000000                      ; Unsigned Binary ;
; SETDDRAM1      ; 00010000000                      ; Unsigned Binary ;
; SETDDRAM2      ; 00011000000                      ; Unsigned Binary ;
; READFLAG       ; 00100000000                      ; Unsigned Binary ;
; WRITERAM       ; 01000000000                      ; Unsigned Binary ;
; READRAM        ; 10000000000                      ; Unsigned Binary ;
; cur_inc        ; 1                                ; Signed Integer  ;
; cur_dec        ; 0                                ; Signed Integer  ;
; cur_shift      ; 1                                ; Signed Integer  ;
; cur_noshift    ; 0                                ; Signed Integer  ;
; open_display   ; 1                                ; Signed Integer  ;
; open_cur       ; 0                                ; Signed Integer  ;
; blank_cur      ; 0                                ; Signed Integer  ;
; shift_display  ; 1                                ; Signed Integer  ;
; shift_cur      ; 0                                ; Signed Integer  ;
; right_shift    ; 1                                ; Signed Integer  ;
; left_shift     ; 0                                ; Signed Integer  ;
; datawidth8     ; 1                                ; Signed Integer  ;
; datawidth4     ; 0                                ; Signed Integer  ;
; twoline        ; 1                                ; Signed Integer  ;
; oneline        ; 0                                ; Signed Integer  ;
; font5x10       ; 1                                ; Signed Integer  ;
; font5x7        ; 0                                ; Signed Integer  ;
; CLK_FREQ       ; 00000010111110101111000010000000 ; Unsigned Binary ;
; DCLK_FREQ      ; 00000000000000000000000000110010 ; Unsigned Binary ;
+----------------+----------------------------------+-----------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 7.2 Build 151 09/26/2007 SJ Full Version
    Info: Processing started: Sat Jan 10 16:27:19 2009
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off lcd_1602 -c lcd_1602
Info: Found 1 design units, including 1 entities, in source file lcd_1602.bdf
    Info: Found entity 1: lcd_1602
Info: Found 1 design units, including 1 entities, in source file lcd.v
    Info: Found entity 1: lcd
Info: Found 2 design units, including 1 entities, in source file char_ram.vhd
    Info: Found design unit 1: char_ram-fun
    Info: Found entity 1: char_ram
Info: Elaborating entity "lcd_1602" for the top level hierarchy
Warning: Processing legacy GDF or BDF entity "lcd_1602" with Max+Plus II bus and instance naming rules
Info: Elaborating entity "lcd" for hierarchy "lcd:inst"
Warning (10036): Verilog HDL or VHDL warning at lcd.v(9): object "state" assigned a value but never read
Warning (10036): Verilog HDL or VHDL warning at lcd.v(10): object "flag" assigned a value but never read
Warning (10036): Verilog HDL or VHDL warning at lcd.v(12): object "counter" assigned a value but never read
Warning (10036): Verilog HDL or VHDL warning at lcd.v(13): object "divcounter" assigned a value but never read
Warning (10240): Verilog HDL Always Construct warning at lcd.v(96): inferring latch(es) for variable "address", which holds its previous value in one or more paths through the always construct
Info (10041): Inferred latch for "address[0]" at lcd.v(96)
Info (10041): Inferred latch for "address[1]" at lcd.v(96)
Info (10041): Inferred latch for "address[2]" at lcd.v(96)
Info (10041): Inferred latch for "address[3]" at lcd.v(96)
Info (10041): Inferred latch for "address[4]" at lcd.v(96)
Info (10041): Inferred latch for "address[5]" at lcd.v(96)
Info: Elaborating entity "char_ram" for hierarchy "lcd:inst|char_ram:charram"
Info: Power-up level of register "lcd:inst|data[0]" is not specified -- using power-up level of High to minimize register
Warning (14130): Reduced register "lcd:inst|data[0]" with stuck data_in port to stuck value VCC
Info: Power-up level of register "lcd:inst|lcd_rs" is not specified -- using power-up level of High to minimize register
Warning (14130): Reduced register "lcd:inst|lcd_rs" with stuck data_in port to stuck value VCC
Warning (14130): Reduced register "lcd:inst|lcd_rw" with stuck data_in port to stuck value GND
Warning (14130): Reduced register "lcd:inst|data[7]" with stuck data_in port to stuck value GND
Info: Power-up level of register "lcd:inst|data[6]" is not specified -- using power-up level of High to minimize register
Warning (14130): Reduced register "lcd:inst|data[6]" with stuck data_in port to stuck value VCC
Warning (14130): Reduced register "lcd:inst|data[5]" with stuck data_in port to stuck value GND
Info: Power-up level of register "lcd:inst|data[4]" is not specified -- using power-up level of High to minimize register
Warning (14130): Reduced register "lcd:inst|data[4]" with stuck data_in port to stuck value VCC
Warning (14130): Reduced register "lcd:inst|data[3]" with stuck data_in port to stuck value GND
Info: Power-up level of register "lcd:inst|data[2]" is not specified -- using power-up level of High to minimize register
Warning (14130): Reduced register "lcd:inst|data[2]" with stuck data_in port to stuck value VCC
Info: Power-up level of register "lcd:inst|data[1]" is not specified -- using power-up level of High to minimize register
Warning (14130): Reduced register "lcd:inst|data[1]" with stuck data_in port to stuck value VCC
Warning: Output pins are stuck at VCC or GND
    Warning (13410): Pin "FLASH_CE" stuck at VCC
    Warning (13410): Pin "rtl8019_cs" stuck at VCC
    Warning (13410): Pin "FLASH_ADDR0" stuck at GND
    Warning (13410): Pin "FLASH_ADDR1" stuck at VCC
    Warning (13410): Pin "FLASH_DQ[7]" stuck at GND
    Warning (13410): Pin "FLASH_DQ[6]" stuck at VCC
    Warning (13410): Pin "FLASH_DQ[5]" stuck at GND
    Warning (13410): Pin "FLASH_DQ[4]" stuck at VCC
    Warning (13410): Pin "FLASH_DQ[3]" stuck at GND
    Warning (13410): Pin "FLASH_DQ[2]" stuck at VCC
    Warning (13410): Pin "FLASH_DQ[1]" stuck at VCC
    Warning (13410): Pin "FLASH_DQ[0]" stuck at VCC
Info: Implemented 43 device resources after synthesis - the final resource count might be different
    Info: Implemented 2 input pins
    Info: Implemented 13 output pins
    Info: Implemented 28 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 29 warnings
    Info: Allocated 161 megabytes of memory during processing
    Info: Processing ended: Sat Jan 10 16:27:21 2009
    Info: Elapsed time: 00:00:02