📄 pll24m_waveforms.html
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<title>Sample Waveforms for PLL24M.vhd </title>
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<h2><CENTER>Sample behavioral waveforms for design file PLL24M.vhd </CENTER></h2>
<P>The following waveforms show the behavior of altpll megafunction for the chosen set of parameters in design PLL24M.vhd. The design PLL24M.vhd has Stratix AUTO pll configured in NORMAL mode The primary clock input to the PLL is INCLK0, with clock period 25000 ps. </P>
<CENTER><img src=PLL24M_wave0.jpg> </CENTER>
<P><CENTER><FONT size=2>Fig. 1 : Wave showing NORMAL mode operation. </CENTER></P>
<P><FONT size=3></P>
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