f012fullc.dat

Templates for c51 from Cygnal

  3Start the PCA Counter/Timer?[D8=40,40]{NX}
  3Enable PCA Overflow interrupt?[D9=01,01]{NX}
  3Click to enter 16 bit counter value (PCA0L, PCA0H)[E9=00,00]{NX}@72
 2Module 0
  3Capture Mode[DA=00,00]@73
   4Capture triggered by positive edge on CEXn[DA=20,3D]{NX}@74
   4Capture triggered by negative edge on CEXn[DA=10,3D]{NX}@74
   4Generate an interrupt ECCF[DA=01,01]{NX}@74
  3Software Timer Mode[DA=08,3D]@73
   4Generate an interrupt ECCF[DA=01,01]{NX}@75
   4Click to enter 16-bit compare value@30
  3High Speed Output Mode[DA=4C,7E]@73
   4Generate an interrupt ECCF[DA=01,01]@76
   4Click to enter 16-bit compare value@30
  3 8-bit PWM[DA=42,7F]@73
   4Generate an interrupt on Rising Edge?[DA=01,01]@77
   4Click to enter 8-bit low-time in PCA counts@35
 2Module 1
  3Capture Mode[DB=00,00]@78
   4Capture triggered by positive edge on CEXn[DB=20,3D]{NX}@79
   4Capture triggered by negative edge on CEXn[DB=10,3D]{NX}@79
   4Generate an interrupt ECCF[DB=01,01]{NX}@79
  3Software Timer Mode[DB=08,3D]@78
   4Generate an interrupt ECCF[DB=01,01]{NX}@7A
   4Click to enter 16-bit compare value@31
  3High Speed Output Mode[DB=4C,7E]@78
   4Generate an interrupt ECCF[DB=01,01]{NX}@7B
   4Click to enter 16-bit compare value@31
  3 8-bit PWM[DB=42,7F]@78
   4Generate an interrupt on Rising Edge?[DB=01,01]@7C
   4Click to enter 8-bit low-time in PCA counts@36
 2Module 2
  3Capture Mode[DC=00,00]@7D
   4Capture triggered by positive edge on CEXn[DC=20,3D]{NX}@7E
   4Capture triggered by negative edge on CEXn[DC=10,3D]{NX}@7E
   4Generate an interrupt ECCF[DC=01,01]{NX}@7E
  3Software Timer Mode[DC=08,3D]@7D
   4Generate an interrupt ECCF[DC=01,01]{NX}@7F
   4Click to enter 16-bit compare value@32
  3High Speed Output Mode[DC=4C,7E]@7D
   4Generate an interrupt ECCF[DC=01,01]{NX}@80
   4Click to enter 16-bit compare value@32
  3 8-bit PWM[DC=42,7F]@7D
   4Generate an interrupt on Rising Edge?[DC=01,01]@81
   4Click to enter 8-bit low-time in PCA counts@37
 2Module 3
  3Capture Mode[DD=00,00]@82
   4Capture triggered by positive edge on CEXn[DD=20,3D]{NX}@83
   4Capture triggered by negative edge on CEXn[DD=10,3D]{NX}@83
   4Generate an interrupt ECCF[DD=01,01]{NX}@83
  3Software Timer Mode[DD=08,3D]@82
   4Generate an interrupt ECCF[DD=01,01]@84
   4Click to enter 16-bit compare value@84
  3High Speed Output Mode[DD=4C,7E]@82
   4Generate an interrupt ECCF[DD=01,01]@85
   4Click to enter 16-bit compare value@33
  3 8-bit PWM[DD=42,7F]@82
   4Generate an interrupt on Rising Edge?[DD=01,01]@86
   4Click to enter 8-bit low-time in PCA counts@38
 2Module 4
  3Capture Mode[DE=00,00]@87
   4Capture triggered by positive edge on CEXn[DE=20,3D]{NX}@88
   4Capture triggered by negative edge on CEXn[DE=10,3D]{NX}@88
   4Generate an interrupt ECCF[DE=01,01]{NX}@88
  3Software Timer Mode[DE=08,3D]@87
   4Generate an interrupt ECCF[DE=01,01]@89
   4Click to enter 16-bit compare value@34
  3High Speed Output Mode[DE=4C,7E]@87
   4Generate an interrupt ECCF[DE=01,01]@8A
   4Click to enter 16-bit compare value@34
  3 8-bit PWM[DE=42,7F]@87
   4Generate an interrupt on Rising Edge?[DE=01,01]@8B
   4Click to enter 8-bit low-time in PCA counts@39
1TITLEADC Configuration
 2Enable ADC0 End of Conversion Interrupt?[E7=02,02]{NX}@15
  3Set ADC0 End of Conversion Interrupt Priority High?[F7=02,02]@15
 2AMUX Configuration
  3Single Ended or Differential input Selector
   4AIN0 and AIN1
    5AIN0 and AIN1 are independent single-ended inputs[BA=00,01]D@8C
    5AIN0, AIN1 are (respectively) +,- differential input pair[BA=01,01]@8C
   4AIN2 and AIN3
    5AIN2 and AIN3 are independent single-ended inputs[BA=00,02]D@8D
    5AIN2, AIN3 are (respectively) +,- differential input pair[BA=02,02]@8D
   4AIN4 and AIN5
    5AIN4 and AIN5 are independent single-ended inputs[BA=00,04]D@8E
    5AIN4, AIN5 are (respectively) +,- differential input pair[BA=04,04]@8E
   4AIN6 and AIN7
    5AIN6 and AIN7 are independent single-ended inputs[BA=00,08]D@8F
    5AIN6, AIN7 are (respectively) +,- differential input pair[BA=08,08]@8F
  3Channel Selector
   4AIN0[BB=00,0F]D
   4AIN1[BB=00,00]@4A
   4AIN2[BB=02,0F]
   4AIN3[BB=00,00]@4B
   4AIN4[BB=04,0F]
   4AIN5[BB=00,00]@4C
   4AIN6[BB=06,0F]
   4AIN7[BB=00,00]@4D
   4Temp Sensor[BB=08,08]
 2SAR Clock Configuration@6F
  3SAR Clock = SYSCLK/16[BC=80,E0]
  3SAR Clock = SYSCLK/8[BC=60,E0]D
  3SAR Clock = SYSCLK/4[BC=40,E0]
  3SAR Clock = SYSCLK/2[BC=20,E0]
  3SAR Clock = SYSCLK/1[BC=00,E0]
 2PGA Gain Selector@6F
  3PGA Gain = 0.5[BC=06,07]@90
  3PGA Gain = 1[BC=00,07]D@90
  3PGA Gain = 2[BC=01,07]@90
  3PGA Gain = 4[BC=02,07]@90
  3PGA Gain = 8[BC=03,07]@90
  3PGA Gain = 16[BC=04,07]@90
 2ADC Configuration
  3Enable ADC in Low power tracking mode[E8=C0,CC]{NX}@5C
  3Start of Conversion Source
   4ADBusy[E8=00,0C]D@91
   4Timer 2 Overflow[E8=0C,0C]@91
   4Timer 3 Overflow[E8=04,0C]@91
   4External CNVSTR[E8=08,0C]@91
     5Enable CNVSTR on the Port I/O Crossbar?[E3=01,01]{NX}@5B
  3ADC Data Justification
   4Right Justified 0x0ddd[E8=00,01]D
   4Left Justified  0xddd0[E8=01,01] 
  3Window Comparison
  3Enable ADC0 Window Comparison Interrupt?[E6=04,04]{NX}@15
   4Set ADC0 Window Comparison Interrupt Priority High?[F6=04,04]{NX}@15
  3Click to Enter "LESS THAN" Threshold@4F
  3Click to Enter "GREATER THAN" Threshold@50  
1TITLETimers Configuration
 2Timer 0 and Timer 1
  3Timer 0
   4Enable Timer 0 Interrupt?[A8=02,02]{NX}@15
    5Set Timer 0 Interrpt Priority High?[B8=02,02]@15
   4Select Mode
    5 13-bit Counter/Timer[89=00,03]D
    5 16-bit Counter/Timer[89=01,03]
    5 8-bit Counter/Timer[89=02,03]
     6Click to Enter 8-bit Reload Value@51
    5 Two 8-bit Counter Timers[89=03,03]
   4Enable Timer 0?[88=10,10]{NX}
   4Gate Timer 0 with /INT0?[89=08,08]{NX}
    5Enable INT0 on the Port I/O Crossbar?[E2=04,04]@5B
   4Timer 0 Event Source
    5Timer 0 uses SYSCLK[8E=08,08]
    5Timer 0 uses SYSCLK/12[8E=00,08]D
    5External T0[89=04,04]
     6Enable T0 on Port I/O Cross Bar?[E2=02,02]@5B
   4Click to Enter Timer 0 Inital Value@52
  3Timer 1@61
   4Enable Timer 1 Interrupt?[A8=08,08]{NX}@15
    5Set Timer 1 Interrpt Priority High?[B8=08,08]@15
   4Select Mode
    5Timer 1 13-bit Counter/Timer Mode[89=00,30]D@62
    5Timer 1 16-bit Counter/Timer Mode[89=10,30]@62
    5Timer 1 8-bit Counter/Timer Mode[89=20,30]@62
     6Click to Enter 8-bit Reload Value@53
    5 Timer 1 Inactive OFF[89=30,30]@62
   4Enable Timer 1?[88=40,40]{NX}@62
   4Gate Timer 1 with INT1?[89=80,80]{NX}
    5Enable /INT1 on the Port I/O Crossbar?[E2=10,10]@5B
   4Timer 1 Event Source
    5Timer 1 uses SYSCLK[8E=10,10]@62
    5Timer 1 uses SYSCLK/12[8E=00,10]D@62
    5External T1[89=40,40]@62
     6Enable T1 on Port I/O Cross Bar?[E2=08,08]@5B
   4Click to Enter Timer 1 Inital Value@54
 2Timer 2@61
  3Enable Timer 2 Interrupt?[A8=20,20]{NX}@15
   4Set Timer 2 Interrpt Priority High?[B8=20,20]@15
  3Select Mode
   4 16-bit Capture[C8=0D,3D]
    5Enable T2EX on Port I/O Cross Bar?[E2=40,40]@5B
   4 16-bit Auto-Reload[C8=04,3D]
    5Click to Enter 16-bit Reload Value@55
   4 Baud Rate Generator[C8=34,34]@56
    5Use Timer 2 overflows for receive clock?[C8=20,20]@56
    5Use Timer 2 overflows for transmit clock?[C8=10,10]@56
  3Timer 2 Event Source
   4Timer 2 uses SYSCLK[8E=20,20]@57
   4Timer 2 uses SYSCLK/2 UART Mode[8E=00,00]@57 
   4Timer 2 uses SYSCLK/12[8E=00,20]D@57
   4External T2[C8=02,02]{NX}
    5Enable T2 on Port I/O Cross Bar?[E2=20,20]@5B
  3Click to Enter Timer 2 16-bit Initial Value@5A
 2Timer 3 16-bit Auto-Reload
  3Enable Timer 3 Interrupt?[E7=01,01]{NX}@15
   4Set Timer 3 Interrpt Priority High?[F7=01,01]@15
  3Click to enter 16-bit Reload Value@58
  3Click to enter 16-bit Initial Value@59
  3Enable Timer 3?[91=04,04]{NX}
  3Timebase
   4SYSCLK[91=02,02]
   4SYSCLK/12[91=00,02]D
  
1TITLEReset Source Configuration
 2Enable Comparator 0 as a Reset Source?[EF=20,20]{NX}@05
 2Enable external CNVSTR signal as Reset Source[EF=40,40]{NX}@06
1TITLEInterrupt Configuration
 2Enable External /INT0?[A8=01,01]{NX}
  3Set External /INT0 Priority to High?[B8=01,01]
 2Enable External /INT1?[A8=04,04]{NX}
  3Set External /INT1 Priority to High?[B8=04,04]
 2Enable External IE4?[E7=04,04]{NX}
  3Set External IE4 Priority to High?[F7=04,04]
 2Enable External IE5?[E7=08,08]{NX}
  3Set External IE5 Priority to High?[F7=08,08]
 2Enable External IE6?[E7=10,10]{NX}
  3Set External IE6 Priority to High?[F7=10,10]
 2Enable External IE7?[E7=20,20]{NX} 
  3Set External IE7 Priority to High?[F7=20,20]
 2Enable SPI Interrupt?[E6=01,01]{NX}@15
  3Set SPI Interrupt Priority to High?[F6=01,01]@15
 2Comparator 0 Rising Edge Interrupt Enabled?[E6=20,20]{NX}@15
  3Set Comparator 0 Rising Edge Interrupt Priority to High?[F6=20,20]@15
 2Comparator 0 Falling Edge Interrupt Enabled?[E6=10,10]{NX}@15
  3Set Comparator 0 Falling Edge Interrupt Priority to High?[F6=10,10]@15
 2Serial Port (UART) Interrupt Enabled?[A8=10,10]{NX}@29
  3Set Serial Port (UART) Interrupt Priority to High?[B8=10,10]@29
 2SMBus Interrupt Enabled?[E6=02,02]{NX}@15
  3Set SMBus Interrupt Priority to High?[F6=02,02]@15
 2PCA Interrupt Enabled?[E6=08,08]{NX}@15
  3Set PCA Interrupt Priority to High?[F6=08,08]@15
 2Timer 0 Interrupt Enabled?[A8=02,02]{NX}@15
  3Set Timer 0 Interrpt Priority to High?[B8=02,02]@15
 2Timer 1 Interrupt Enabled?[A8=08,08]{NX}@15
  3Set Timer 1 Interrpt Priority to High?[B8=08,08]@15
 2Timer 2 Interrupt Enabled?[A8=20,20]{NX}@15
  3Set Timer 2 Interrpt Priority to High?[B8=20,20]@15
 2Timer 3 Interrupt Enabled?[E7=01,01]{NX}@15
  3Set Timer 3 Interrpt Priority to High?[F7=01,01]@15
 2ADC0 End of Conversion Interrupt Enabled?[E7=02,02]{NX}@15
  3Set ADC0 End of Conversion Interrupt Priority to High?[F7=02,02]@15
 2ADC0 Window Comparison Interrupt Enabled?[E6=04,04]{NX}@15
  3Set ADC0 Window Comparison Interrupt Priority to High?[F6=04,04]@15
 2External Clock Source Valid Interrupt Enabled?[E7=80,80]{NX}
  3Set External Clock Source Valid Interrupt Priority to High?[F7=80,80]
 2Enable Global Interrupts?[A8=80,80]{NX}
END