f226fullc.dat

Templates for c51 from Cygnal

1TITLEReference Control Register
 2Reference Buffer Control
  3VDD VREF[D1=03,03]@5E
  3External VREF[D1=00,03]@5D
1TITLESPI Configuration
 2SPI Interrupt Enabled?[E6=01,01]{NX}@15
  3Set SPI Interrupt Priority High?[F6=01,01]@15
 2SPI Clock Phase
  3Data sampled on first edge of SCK period?[9A=00,80]D
  3Data sampled on second edge of SCK period?[9A=80,80]
 2SPI Clock Polarity
  3SCK line low in idle state?[9A=00,40]D
  3SCK line high in idle state?[9A=40,40]
 2Select Mode
  3Enable Master Mode?[F8=02,02]@6C
   4SPI Frame Size
    5'1'[9A=00,07]@6D
    5'2'[9A=01,07]@6D
    5'3'[9A=02,07]@6D
    5'4'[9A=03,07]@6D
    5'5'[9A=04,07]@6D
    5'6'[9A=05,07]@6D
    5'7'[9A=06,07]@6D
    5'8'[9A=07,07]D@6D
   4SPI Clock Frequency
    5Frequency=SYSCLK/2[9A=00,00]@10	  
    5Frequency=SYSCLK/10[9A=00,00]@11
    5Frequency=SYSCLK/200[9A=00,00]@12
    5Click to Set Custom Frequency[9A=00,00]@13
  3Enable Slave Mode?[F8=00,02]D@6C
   2Enable SPI?[F8=00,00]{NX}@14
1TITLEUART Configuration
 2UART Interrupt Configuration
  3Clear UART Recieve and Transmit Interrupt Flags(RECOMMENDED)?[98=00,00]{NX}@28 
  3Enable Serial Port (UART) Interrupt?[A8=10,10]{NX}@29
   4Set Serial Port (UART) Interrupt Priority High?[B8=10,10]@29
  2Enable UART Reception?[98=10,10]{NX}                                                   
 2Select Mode
  3 0: Synchronous Mode: Baud Rate=SYSCLK/12[98=00,C0]@6E
  3 1: Asynchronous Mode: 8-bit UART, Variable Baud Rate[98=40,C0]@6E
   4Use Timer 1 as Baud Rate Source?[88=40,40]@19
    5Enable Serial Port Baud Rate Doubler(SMOD=1)?[87=80,80]{NX}
    5Timer 1 uses the system clock not divided by 12(T1M=1)[8E=10,10]{NX}@19
    5Click to Set 8-bit TH1 reload value{NX}[00=00,00]@18
   4Use Timer 2 as Baud Rate Source?[C8=34,34]@27
    5Custom RCLK and TCLK settings
     6Use Timer 2 overflows for Transmit Clock?[C8=10,10]{NX}@62
     6Use Timer 2 overflows for Receive Clock?[C8=20,20]{NX}@62
    5Click to set 16-bit RCAP2H:RCAP2L reload value[8E=00,00]{NX}@20
  3 2: Asynchronous Mode: 9-bit UART, Fixed Baud Rate[98=80,C0]@6E
   4SYSCLK/32?[87=80,80]
   4SYSCLK/64?[87=00,80]D
  3 3: Asychronous Mode: 9-bit UART,Variable Baud Rate[98=C0,C0]@6E
   4Use Timer 1 as Baud Rate Source?[88=40,40]D@19
    5Enable Serial Port Baud Rate Doubler(SMOD=1)?[87=80,80]{NX}
    5Timer 1 uses system clock not divided by 12(T1M=1)[8E=10,10]{NX}@19
    5Click to Set 8-bit TH1 reload value{NX}[00=00,00]@18
   4Use Timer 2 as Baud Rate Source?[C8=34,34]@27
    5Custom RCLK and TCLK settings
     6Timer 2 overflows used for Transmit Clock?[C8=10,10]{NX}
     6Timer 2 overflows used for Receive Clock?[C8=20,20]{NX}
    5Click to set 16-bit RCAP2H:RCAP2L reload value[8E=00,00]{NX}@20
1TITLEADC Configuration
 2Enable ADC0 End of Conversion Interrupt?[E7=02,02]{NX}@15
  3Set ADC0 End of Conversion Interrupt Priority High?[F7=02,02]@15
 2AMUX Configuration
  3Enable AMUX[BB=20,20]
  3Channel Selector
	4Port Select
	 5Port 0 Select[BB=00,18]D@66
     5Port 1 Select[BB=08,18]@66
     5Port 2 Select[BB=10,18]@66
     5Port 3 Select[BB=18,18]@66
	4Pin Select
	 5Pin 0 of Selected Port[BB=00,07]D@66
	 5Pin 1 of Selected Port[BB=01,07]@66
	 5Pin 2 of Selected Port[BB=02,07]@66
	 5Pin 3 of Selected Port[BB=03,07]@66
     5Pin 4 of Selected Port[BB=04,07]@66
	 5Pin 5 of Selected Port[BB=05,07]@66
	 5Pin 6 of Selected Port[BB=06,07]@66
	 5Pin 7 of Selected Port[BB=07,07]@66	  		  	    	   
 2SAR Clock Configuration@6F
  3SAR Clock = SYSCLK/16[BC=80,E0]
  3SAR Clock = SYSCLK/8[BC=60,E0]D
  3SAR Clock = SYSCLK/4[BC=40,E0]
  3SAR Clock = SYSCLK/2[BC=20,E0]
  3SAR Clock = SYSCLK/1[BC=00,E0]
 2PGA Gain Selector@6F
  3PGA Gain = 0.5[BC=06,07]@90
  3PGA Gain = 1[BC=00,07]D@90
  3PGA Gain = 2[BC=01,07]@90
  3PGA Gain = 4[BC=02,07]@90
  3PGA Gain = 8[BC=03,07]@90
  3PGA Gain = 16[BC=04,07]@90
 2ADC Configuration
  3Enable ADC in Low power tracking mode[E8=40,40]{NX}@5C
  3Start of Conversion Source
   4ADBusy[E8=00,0C]D@91
   4Timer 2 Overflow[E8=0C,0C]@91
  3Window Comparison
   4Click to Enter "LESS THAN" Threshold@95
   4Click to Enter "GREATER THAN" Threshold@96
   4Enable ADC0 Window Comparison Interrupt?[E6=04,04]{NX}@15
    5Set ADC0 Window Comparison Interrupt Priority High?[F6=04,04]@15
1TITLETimers Configuration
 2Timer 0 and Timer 1
  3Timer 0
   4Enable Timer 0 Interrupt?[A8=02,02]{NX}@15
    5Set Timer 0 Interrpt Priority High?[B8=02,02]@15
   4Select Mode
    5 13-bit Counter/Timer[89=00,03]D
    5 16-bit Counter/Timer[89=01,03]
    5 8-bit Counter/Timer[89=02,03]
     6Click to Enter 8-bit Reload Value@51
    5 Two 8-bit Counter Timers[89=03,03]
   4Enable Timer 0?[88=10,10]{NX} 
   4Gate Timer 0 with /INT0?[89=08,08]{NX}
    5Enable /INT0 on the Port I/O MUX?[E1=04,04]@65B
   4Timer 0 Event Source
    5Timer 0 uses SYSCLK[8E=08,08]
    5Timer 0 uses SYSCLK/12[8E=00,08]D
    5External T0[89=04,04]
	 6Enable T0 on the Port I/O MUX?[E1=10,10]@65B
   4Click to Enter Timer 0 Inital Value@52
  3Timer 1@61
   4Enable Timer 1 Interrupt?[A8=08,08]{NX}@15
    5Set Timer 1 Interrpt Priority High?[B8=08,08]@15
   4Select Mode
    5Timer 1 13-bit Counter/Timer Mode[89=00,30]D@62
    5Timer 1 16-bit Counter/Timer Mode[89=10,30]@62
    5Timer 1 8-bit Counter/Timer Mode[89=20,30]@62
     6Click to Enter 8-bit Reload Value@53
    5 Timer 1 Inactive OFF[89=30,30]@62
   4Enable Timer 1?[88=40,40]{NX}@62
   4Gate Timer 1 with INT1?[89=80,80]{NX}
    5Enable /INT1 on the Port I/O MUX?[E1=08,08]@65B 
   4Timer 1 Event Source
    5Timer 1 uses SYSCLK[8E=10,10]@62
    5Timer 1 uses SYSCLK/12[8E=00,10]D@62
    5External T1[89=40,40]@62
	 6Enable T1 on the Port I/O MUX?[E1=20,20]@65B
   4Click to Enter Timer 1 Inital Value@54
 2Timer 2@61
  3Enable Timer 2 Interrupt?[A8=20,20]{NX}@15
   4Set Timer 2 Interrpt Priority High?[B8=20,20]@15
  3Select Mode
   4 16-bit Capture[C8=0D,3D]
   4 16-bit Auto-Reload[C8=04,3D]
    5Click to Enter 16-bit Reload Value@55
   4 Baud Rate Generator[C8=34,34]@56
    5Use Timer 2 overflows for receive clock?[C8=20,20]@56
    5Use Timer 2 overflows for transmit clock?[C8=10,10]@56
  3Timer 2 Event Source
   4Timer 2 uses SYSCLK[8E=20,20]@57
   4Timer 2 uses SYSCLK/2 UART Mode[8E=00,00]@57 
   4Timer 2 uses SYSCLK/12[8E=00,20]@57
   4External T2[C8=02,02]{NX}
    5Enable T2 on the Port I/O MUX?[E1=40,40]@65B
  3Click to Enter Timer 2 16-bit Initial Value@5A
1TITLEReset Source Configuration
 2Enable Comparator 0 as a Reset Source?[EF=20,20]{NX}@05
1TITLEInterrupt Configuration
 2Enable External /INT0?[A8=01,01]{NX}
  3Set External /INT0 Priority to High?[B8=01,01]
 2Enable External /INT1?[A8=04,04]{NX}
  3Set External /INT1 Priority to High?[B8=04,04]
 2Enable External IE4?[E7=04,04]{NX}
  3Set External IE4 Priority to High?[F7=04,04]
 2Enable External IE5?[E7=08,08]{NX}
  3Set External IE5 Priority to High?[F7=08,08]
 2Enable External IE6?[E7=10,10]{NX}
  3Set External IE6 Priority to High?[F7=10,10]
 2Enable External IE7?[E7=20,20]{NX} 
  3Set External IE7 Priority to High?[F7=20,20]
 2Enable SPI Interrupt?[E6=01,01]{NX}@15
  3Set SPI Interrupt Priority to High?[F6=01,01]@15
 2Comparator 0 Rising Edge Interrupt Enabled?[E6=20,20]{NX}@15
  3Set Comparator 0 Rising Edge Interrupt Priority to High?[F6=20,20]@15
 2Comparator 0 Falling Edge Interrupt Enabled?[E6=10,10]{NX}@15
  3Set Comparator 0 Falling Edge Interrupt Priority to High?[F6=10,10]@15
 2Comparator 1 Rising Edge Interrupt Enabled?[E6=80,80]{NX}@15
  3Set Comparator 1 Rising Edge Interrupt Priority to High?[F6=80,80]@15
 2Comparator 1 Falling Edge Interrupt Enabled?[E6=40,40]{NX}@15
  3Set Comparator 1 Falling Edge Interrupt Priority to High?[F6=40,40]@15
 2Serial Port (UART) Interrupt Enabled?[A8=10,10]{NX}@29
  3Set Serial Port (UART) Interrupt Priority to High?[B8=10,10]@29
 2Timer 0 Interrupt Enabled?[A8=02,02]{NX}@15
  3Set Timer 0 Interrpt Priority to High?[B8=02,02]@15
 2Timer 1 Interrupt Enabled?[A8=08,08]{NX}@15
  3Set Timer 1 Interrpt Priority to High?[B8=08,08]@15
 2Timer 2 Interrupt Enabled?[A8=20,20]{NX}@15
  3Set Timer 2 Interrpt Priority to High?[B8=20,20]@15
 2ADC0 End of Conversion Interrupt Enabled?[E7=02,02]{NX}@15
  3Set ADC0 End of Conversion Interrupt Priority to High?[F7=02,02]@15
 2ADC0 Window Comparison Interrupt Enabled?[E6=04,04]{NX}@15
  3Set ADC0 Window Comparison Interrupt Priority to High?[F6=04,04]@15
 2External Clock Source Valid Interrupt Enabled?[E7=80,80]{NX}
  3Set External Clock Source Valid Interrupt Priority to High?[F7=80,80]
 2Enable Global Interrupts?[A8=80,80]{NX}
END