📄 uart_test.log

📁 主芯片：Actel的FPGA030,Verilog语言,串口发送和接收的例程

💻 LOG

字号:

Software Version: 8.3.0.22
PDB file 'E:\programer_new\UART\project\designer\impl1\uart_test.pdb' has been loaded
successfully.
DESIGN : uart_test;  CHECKSUM : 1242;  PDB_VERSION : 1.4
programmer 'FPBBALTLPT1' : Para2Buff
Opened 'E:\programer_new\UART\project\designer\impl1\uart_test_fp\uart_test.pro'

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