uart_test.pro

来自「主芯片：Actel的FPGA030,Verilog语言,串口发送和接收的例程」· PRO 代码 · 共 58 行

<project name="uart_test" version="1.1">
    <ProjectDirectory>
        E:\programer_new\UART\project\designer\impl1\uart_test_fp
    </ProjectDirectory>
    <View>
        SingleSTAPLView
    </View>
    <LogFile>
        E:\programer_new\UART\project\designer\impl1\uart_test_fp\uart_test.log
    </LogFile>
    <programmer status="enable" type="Para2Buff" revision="UndefRev" connection="ALTLPT1">
        <name>
            FPBBALTLPT1
        </name>
        <id>
            FPBBALTLPT1
        </id>
    </programmer>
    <configuration>
        <Hardware>
            <FlashPro>
                <TCK>
                    4000000
                </TCK>
                <Vpp/>
                <Vpn/>
                <Vddl/>
                <Vdd>
2500                </Vdd>
            </FlashPro>
            <FlashProLite>
                <TCK>
                    4000000
                </TCK>
                <Vpp/>
                <Vpn/>
            </FlashProLite>
            <FlashPro3>
                <TCK>
                    4000000
                </TCK>
                <Vpump/>
            </FlashPro3>
        </Hardware>
        <Algo type="PDB">
            <filename>
                E:\programer_new\UART\project\designer\impl1\uart_test.pdb
            </filename>
            <local>
                projectData\uart_test.pdb
            </local>
            <SelectedAction>
                PROGRAM
            </SelectedAction>
        </Algo>
    </configuration>
</project>