nandflash.srr

用VHDL开发的NANDFLASH的读写程序,给出 NANDFLASH的时序正确的读写

#Build: Synplify Pro 8.5, Build 429R, Dec  8 2005
#install: D:\Synplicity\fpga_85
#OS: Windows XP 5.1
#Hostname: XM1

#Tue Nov 25 16:44:10 2008

$ Start of Compile
#Tue Nov 25 16:44:10 2008

Synplicity VHDL Compiler, version 3.4.1, Build 089R, built Mar  8 2006
Copyright (C) 1994-2006, Synplicity Inc.  All Rights Reserved

@N:"D:\Synplicity\NANDFLASH\NANDFLASH.vhd":28:7:28:20|Top entity is set to TEST_NANDFLASH.
VHDL syntax check successful!
File D:\Synplicity\NANDFLASH\NANDFLASH.vhd changed - recompiling
@N: CD630 :"D:\Synplicity\NANDFLASH\NANDFLASH.vhd":21:7:21:20|Synthesizing work.test_nandflash.translated 
Post processing for work.test_nandflash.translated
@W: CL189 :"D:\Synplicity\NANDFLASH\NANDFLASH.vhd":195:6:195:7|Register bit NFL_DATA_OUT(6) is always 0, optimizing ...
@W: CL189 :"D:\Synplicity\NANDFLASH\NANDFLASH.vhd":195:6:195:7|Register bit NFL_DATA_OUT(5) is always 0, optimizing ...
@W: CL189 :"D:\Synplicity\NANDFLASH\NANDFLASH.vhd":195:6:195:7|Register bit NFL_DATA_OUT(3) is always 0, optimizing ...
@W: CL189 :"D:\Synplicity\NANDFLASH\NANDFLASH.vhd":195:6:195:7|Register bit NFL_DATA_OUT(2) is always 0, optimizing ...
@W: CL189 :"D:\Synplicity\NANDFLASH\NANDFLASH.vhd":195:6:195:7|Register bit NFL_DATA_OUT(1) is always 0, optimizing ...
@W: CL189 :"D:\Synplicity\NANDFLASH\NANDFLASH.vhd":195:6:195:7|Register bit NFL_DATA_OUT(0) is always 0, optimizing ...
@W: CL189 :"D:\Synplicity\NANDFLASH\NANDFLASH.vhd":233:6:233:7|Register bit repeat_addr_maxCNT(0) is always 0, optimizing ...
@W: CL189 :"D:\Synplicity\NANDFLASH\NANDFLASH.vhd":233:6:233:7|Register bit repeat_addr_maxCNT(1) is always 0, optimizing ...
@W: CL189 :"D:\Synplicity\NANDFLASH\NANDFLASH.vhd":233:6:233:7|Register bit repeat_addr_maxCNT(2) is always 0, optimizing ...
@W: CL189 :"D:\Synplicity\NANDFLASH\NANDFLASH.vhd":233:6:233:7|Register bit repeat_rdata_maxCNT(0) is always 1, optimizing ...
@W: CL189 :"D:\Synplicity\NANDFLASH\NANDFLASH.vhd":233:6:233:7|Register bit repeat_rdata_maxCNT(1) is always 1, optimizing ...
@W: CL189 :"D:\Synplicity\NANDFLASH\NANDFLASH.vhd":233:6:233:7|Register bit repeat_rdata_maxCNT(2) is always 0, optimizing ...
@N: CL177 :"D:\Synplicity\NANDFLASH\NANDFLASH.vhd":233:6:233:7|Sharing sequential element LoadRPcnt_rdata.
@W: CL189 :"D:\Synplicity\NANDFLASH\NANDFLASH.vhd":195:6:195:7|Register bit NFL_DATA_OUT_cl(7) is always 1, optimizing ...
@N: CL201 :"D:\Synplicity\NANDFLASH\NANDFLASH.vhd":233:6:233:7|Trying to extract state machine for register OP_STATE
Extracted state machine for register OP_STATE
State machine has 11 reachable states with original encodings of:
   00000000
   00000001
   00000010
   00000011
   00000100
   00000101
   00000110
   00000111
   00001000
   00001001
   00001010
@END
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Tue Nov 25 16:44:11 2008

###########################################################[
Synplicity CPLD Technology Mapper, Version 8.4.0.p, Build 075R, Built Mar  8 2006
Copyright (C) 1994-2006, Synplicity Inc.  All Rights Reserved
Version 8.5
@N:"d:\synplicity\nandflash\nandflash.vhd":173:6:173:7|Found counter in view:work.TEST_NANDFLASH(translated) inst repeat_rdata_CNT[2:0]
@N:"d:\synplicity\nandflash\nandflash.vhd":153:6:153:7|Found counter in view:work.TEST_NANDFLASH(translated) inst repeat_addr_CNT[2:0]
@N:"d:\synplicity\nandflash\nandflash.vhd":133:6:133:7|Found counter in view:work.TEST_NANDFLASH(translated) inst delayCNT[2:0]
Encoding state machine work.TEST_NANDFLASH(translated)-OP_STATE_h.OP_STATE[0:10]
original code -> new code
   00000000 -> 00000000000
   00000001 -> 00000000011
   00000010 -> 00000000101
   00000011 -> 00000001001
   00000100 -> 00000010001
   00000101 -> 00000100001
   00000110 -> 00001000001
   00000111 -> 00010000001
   00001000 -> 00100000001
   00001001 -> 01000000001
   00001010 -> 10000000001
@W: BN132 :"d:\synplicity\nandflash\nandflash.vhd":233:6:233:7|Removing instance LoadRPcnt_addr,  because it is equivalent to instance OP_STATE_h.OP_STATE[9]
---------------------------------------
Resource Usage Report

Simple gate primitives:
FD11            68 uses
AND2            90 uses
OR2             12 uses
IB11            6 uses
OB11            37 uses
BI11            8 uses
INV             62 uses
MUX2            50 uses
XOR2            8 uses


@N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis.
Version 8.5
Mapper successful!
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Tue Nov 25 16:44:12 2008

###########################################################]