oneshot.vhd

来自「This is a project about PWM. Application」· VHDL 代码 · 共 52 行

---------------------------------------------------------------------------
-- oneshot 
-- fire one large pulse ("duration") on synchronous trigger
---------------------------------------------------------------------------

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity oneshot is
  port(
    clk: in std_logic;
    trigger: in std_logic;
    duration: in std_logic_vector(31 downto 0);
    output: out std_logic
  );
end oneshot;


architecture behavior of oneshot is

type statetype is (stdby,run);
signal state: statetype := stdby;
signal count: std_logic_vector(31 downto 0);

begin
  process
    begin
      wait until rising_edge(clk);
      case state is

        when stdby => 
	  output <= '0';
	  count <= (others => '0');
          if (trigger = '1') then
	    state <= run;
          end if;

        when run =>
 	  output <= '1';
	  count <= count + '1';
	  if (count = duration) then
	    output <= '0';
	    state <= stdby;
	  end if;
 
      end case;
    end process;
end behavior;