3to8decoder.txt

3 to 8 decoder is used to decode from 3 bit data to 8 bit data used in many applications

------------------------3 to 8 decoder---------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;


entity v3to8dec is
    Port ( a : in std_logic_vector(2 downto 0);
           g1 : in std_logic;
           g2a : in std_logic;
           g2b : in std_logic;
           y : out std_logic_vector(7 downto 0));
end v3to8dec;

architecture v3to8dec_arch of v3to8dec is
signal y_i:std_logic_vector(7 downto 0);
begin

	  with a select Y_i<="11111110" when "000",
	  							"11111101" when "001",
								"11111011" when "010",
								"11110111" when "011",
								"11101111" when "100",
								"11011111" when "101",
								"10111111" when "110",
								"01111111" when "111",
								"11111111" when others;
    y<=Y_i when (g1 and not g2a and not g2b)='1' else "11111111";

end v3to8dec_arch;


-----------------------3 to 8 decoder test bench----------------------

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_unsigned.all;
USE ieee.numeric_std.ALL;

ENTITY v3to8dec_tb_vhd IS
END v3to8dec_tb_vhd;

ARCHITECTURE behavior OF v3to8dec_tb_vhd IS 

	-- Component Declaration for the Unit Under Test (UUT)
	COMPONENT v3to8dec
	PORT(
		a : IN std_logic_vector(2 downto 0);
		g1 : IN std_logic;
		g2a : IN std_logic;
		g2b : IN std_logic;          
		y : OUT std_logic_vector(7 downto 0)
		);
	END COMPONENT;

	--Inputs
	SIGNAL g1 :  std_logic := '0';
	SIGNAL g2a :  std_logic := '0';
	SIGNAL g2b :  std_logic := '0';
	SIGNAL a :  std_logic_vector(2 downto 0) := (others=>'0');

	--Outputs
	SIGNAL y :  std_logic_vector(7 downto 0);

BEGIN

	-- Instantiate the Unit Under Test (UUT)
	uut: v3to8dec PORT MAP(
		a => a,
		g1 => g1,
		g2a => g2a,
		g2b => g2b,
		y => y
	);

	tb : PROCESS
	BEGIN

		g1<='0';g2a<='0';g2b<='0';wait for 5ns;
		g1<='0';g2a<='0';g2b<='1';wait for 5ns;
		g1<='0';g2a<='1';g2b<='0';wait for 5ns;
		g1<='0';g2a<='1';g2b<='1';wait for 5ns;
		g1<='1';g2a<='0';g2b<='1';wait for 5ns;
		g1<='1';g2a<='1';g2b<='0';wait for 5ns;
		g1<='1';g2a<='1';g2b<='1';wait for 5ns;
		g1<='1';g2a<='0';g2b<='0';wait for 5ns;
		a<="000";wait for 10ns;
		a<="001";wait for 10ns;
		a<="010";wait for 10ns;
		a<="011";wait for 10ns;
		a<="100";wait for 10ns;
		a<="101";wait for 10ns;
		a<="110";wait for 10ns;
		a<="111";wait for 10ns;
		wait; -- will wait forever
	END PROCESS;

END;