system.h

Nios II最小实验系统

/* system.h
 *
 * Machine generated for a CPU named "cpu_nios2_small" as defined in:
 * D:\example\nios_small\CPU32_Nios2_Small.ptf
 *
 * Generated: 2005-07-22 09:03:46.5
 *
 */

#ifndef __SYSTEM_H_
#define __SYSTEM_H_

/*

DO NOT MODIFY THIS FILE

   Changing this file will have subtle consequences
   which will almost certainly lead to a nonfunctioning
   system. If you do modify this file, be aware that your
   changes will be overwritten and lost when this file
   is generated again.

DO NOT MODIFY THIS FILE

*/

/******************************************************************************
*                                                                             *
* License Agreement                                                           *
*                                                                             *
* Copyright (c) 2003 Altera Corporation, San Jose, California, USA.           *
* All rights reserved.                                                        *
*                                                                             *
* Permission is hereby granted, free of charge, to any person obtaining a     *
* copy of this software and associated documentation files (the "Software"),  *
* to deal in the Software without restriction, including without limitation   *
* the rights to use, copy, modify, merge, publish, distribute, sublicense,    *
* and/or sell copies of the Software, and to permit persons to whom the       *
* Software is furnished to do so, subject to the following conditions:        *
*                                                                             *
* The above copyright notice and this permission notice shall be included in  *
* all copies or substantial portions of the Software.                         *
*                                                                             *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR  *
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,    *
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER      *
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING     *
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER         *
* DEALINGS IN THE SOFTWARE.                                                   *
*                                                                             *
* This agreement shall be governed in all respects by the laws of the State   *
* of California and by the laws of the United States of America.              *
*                                                                             *
******************************************************************************/

/*
 * system configuration
 *
 */

#define ALT_SYSTEM_NAME "CPU32_Nios2_Small"
#define ALT_CPU_NAME "cpu_nios2_small"
#define ALT_CPU_ARCHITECTURE "altera_nios2"
#define ALT_DEVICE_FAMILY "CYCLONE"
#define ALT_STDIN "/dev/null"
#define ALT_STDOUT "/dev/null"
#define ALT_STDERR "/dev/null"
#define ALT_CPU_FREQ 50000000
#define ALT_IRQ_BASE NULL

/*
 * processor configuration
 *
 */

#define NIOS2_CPU_IMPLEMENTATION "small"

#define NIOS2_ICACHE_SIZE 2048
#define NIOS2_DCACHE_SIZE 0
#define NIOS2_ICACHE_LINE_SIZE 32
#define NIOS2_DCACHE_LINE_SIZE 0

#define NIOS2_EXCEPTION_ADDR 0x00000020
#define NIOS2_RESET_ADDR 0x00000000

#define NIOS2_HAS_DEBUG_STUB

#define NIOS2_CPU_ID_SIZE 1
#define NIOS2_CPU_ID_VALUE 0

/*
 * A define for each class of peripheral
 *
 */

#define __ALTERA_AVALON_ONCHIP_MEMORY2
#define __ALTERA_AVALON_PIO

/*
 * onchip_ram configuration
 *
 */

#define ONCHIP_RAM_NAME "/dev/onchip_ram"
#define ONCHIP_RAM_TYPE "altera_avalon_onchip_memory2"
#define ONCHIP_RAM_BASE 0x00000000
#define ONCHIP_RAM_ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE 0
#define ONCHIP_RAM_RAM_BLOCK_TYPE "M4K"
#define ONCHIP_RAM_GUI_RAM_BLOCK_TYPE "Automatic"
#define ONCHIP_RAM_WRITEABLE 1
#define ONCHIP_RAM_DUAL_PORT 0
#define ONCHIP_RAM_SIZE_VALUE 4
#define ONCHIP_RAM_SIZE_MULTIPLE 1024
#define ONCHIP_RAM_CONTENTS_INFO "SIMDIR/onchip_ram.dat 1121927934 QUARTUS_PROJECT_DIR/onchip_ram.hex 1121927934"

/*
 * led_io configuration
 *
 */

#define LED_IO_NAME "/dev/led_io"
#define LED_IO_TYPE "altera_avalon_pio"
#define LED_IO_BASE 0x00001800
#define LED_IO_DO_TEST_BENCH_WIRING 0
#define LED_IO_DRIVEN_SIM_VALUE 0x0000
#define LED_IO_HAS_TRI 0
#define LED_IO_HAS_OUT 1
#define LED_IO_HAS_IN 0
#define LED_IO_CAPTURE 0
#define LED_IO_EDGE_TYPE "NONE"
#define LED_IO_IRQ_TYPE "NONE"
#define LED_IO_FREQ 50000000

/*
 * system library configuration
 *
 */

#define ALT_SYS_CLK none
#define ALT_TIMESTAMP_CLK none
#define ALT_MAX_FD 32

/*
 * Devices associated with code sections.
 *
 */

#define ALT_TEXT_DEVICE       ONCHIP_RAM
#define ALT_RODATA_DEVICE     ONCHIP_RAM
#define ALT_RWDATA_DEVICE     ONCHIP_RAM
#define ALT_EXCEPTIONS_DEVICE ONCHIP_RAM
#define ALT_RESET_DEVICE      ONCHIP_RAM

/*
 * Configure for run from flash mode
 *
 */

#define ALT_RUN_FROM_FLASH


#endif /* __SYSTEM_H_ */