📄 gen_explore_table.pl
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while (<IN>) { chomp; s/#.*//; next if /^(\s)*$/; s/^\s+//; if($_ =~ /$match_key[^_]/) { $counter++; $stop_flag = 0; } if(($counter == 2) && ($_ !~ /^\|/)) { $stop_flag = 1; } if(($counter == 1) && ($_ =~ /$match_key[^_]/)){ my @tmp = split (/\|/,$_); $numCells = $tmp[2]; } if(($counter == 2) && ($stop_flag == 0)) { @tmp = split (/\|/,$_); my $key = $tmp[2]; $clk_table{$key} = $_; $clkNames[$numClk] = $key; $numClk++; } if(($counter == 3) && ($_ =~ /$match_key[^_]/)){ my @tmp = split (/\|/,$_); $maxTran = $tmp[2]; $maxCap = $tmp[4]; } } my $i = 0; foreach $clk (@clkNames) { my $line = $clk_table{$clk}; my @tmp = split (/\|/,$line); $cur_wns = $tmp[5]; if($i == 0) { $final_wns = $cur_wns; $wns_clk_name = $clk; } else { if($cur_wns < $final_wns) { $final_wns = $cur_wns; $wns_clk_name = $clk; } } #print "CLK NAME: $clk WNS: $tmp[5] TNS: $tmp[6] VIOL PATHS: $tmp[7]\n"; $i++; } $final_wns_line = $clk_table{$wns_clk_name}; @final_wns_array = split (/\|/,$final_wns_line); #print OUT "$final_wns_array[5],$final_wns_array[6],$final_wns_array[7],$wns_clk_name,$numCells,$maxTran,$maxCap,"; close(IN); close(OUT);}sub getPnaLog {if ( !(-e $pnaLog) ) {$gnd_IR_drop = "-";$pwr_IR_drop = "-";} else { my $infile = $_[0]; my $outfile = $_[1]; my $flag = 0; my $vss_vdd = 0; # 0 for VSS , 1 for VDD open (IN, $infile) || die "couldn't open file: $infile\n"; open (OUT, ">>$outfile") || die "couldn't open file: $outfile\n"; while (<IN>) { chomp; s/#.*//; next if /^(\s)*$/; s/^\s+//; if($_ =~ /Summary/) { $flag = 1; } next if ($flag == 0); if(($vss_vdd == 0) && ($_ =~ /^Maximum IR drop:/)) { my @tmp = split (/\s+/,$_); $gnd_IR_drop = $tmp[3]; } if(($vss_vdd == 0) && ($_ =~ /^Maximum Wire EM:/)) { my @tmp = split (/\s+/,$_); $gnd_Wire_EM = $tmp[3]; } if(($vss_vdd == 0) && ($_ =~ /^Maximum Via EM:/)) { my @tmp = split (/\s+/,$_); $gnd_Via_EM = $tmp[3]; $vss_vdd = 1; } if(($vss_vdd == 1) && ($_ =~ /^Maximum IR drop:/)) { my @tmp = split (/\s+/,$_); $pwr_IR_drop = $tmp[3]; } if(($vss_vdd == 1) && ($_ =~ /^Maximum Wire EM:/)) { my @tmp = split (/\s+/,$_); $pwr_Wire_EM = $tmp[3]; } if(($vss_vdd == 1) && ($_ =~ /^Maximum Via EM:/)) { my @tmp = split (/\s+/,$_); $pwr_Via_EM = $tmp[3]; } }} #print OUT "$gnd_IR_drop,$gnd_Wire_EM,$gnd_Via_EM,$pwr_IR_drop,$pwr_Wire_EM,$pwr_Via_EM\n"; #print OUT " # <tr> # <td>$prefix</td> # <td nowrap align=center>$total_overflow</td> # <td nowrap align=center>$max_overflow</td> # <td nowrap align=center>$grc_overflow</td> # <td nowrap align=center>$total_wireLength</td> # <td>$final_wns_array[5]</td> # <td>$final_wns_array[6]</td> # <td nowrap align=right>$final_wns_array[7]</td> # <td nowrap align=center>$wns_clk_name</td> # <td nowrap align=center>$numCells</td> # <td>$maxTran</td> # <td>$maxCap</td> # <td nowrap align=right>$gnd_IR_drop</td> # <td nowrap align=center>$gnd_Wire_EM</td> # <td nowrap align=center>$gnd_Via_EM</td> # <td nowrap align=right>$pwr_IR_drop</td> # <td nowrap align=center>$pwr_Wire_EM</td> # <td nowrap align=center>$pwr_Via_EM</td> # <td nowrap align=center><a href=\./$inputDir/$runLog\><b>log</b></a></td> # <td nowrap align=center><a href=\./$inputDir/$ipoLog\><b>log</b></a></td> # <td nowrap align=center><a href=\./$inputDir/$pnaLog\><b>log</b></a></td> # <td nowrap align=center><a href=\./$inputDir/$routeLog\><b>log</b></a></td> # </tr>\n"; $print_table[$print_table_row][0] = $prefix; $print_table[$print_table_row][1] = $total_overflow; $print_table[$print_table_row][2] = $max_overflow; $print_table[$print_table_row][3] = $grc_overflow; $print_table[$print_table_row][4] = $total_wireLength; $print_table[$print_table_row][5] = $final_wns_array[5]; $print_table[$print_table_row][6] = $final_wns_array[6]; $print_table[$print_table_row][7] = $final_wns_array[7]; $print_table[$print_table_row][8] = $wns_clk_name; $print_table[$print_table_row][9] = $numCells; $print_table[$print_table_row][10] = $maxTran; $print_table[$print_table_row][11] = $maxCap; $print_table[$print_table_row][12] = $gnd_IR_drop; $print_table[$print_table_row][13] = $pwr_IR_drop; $print_table[$print_table_row][14] = $runLog; $print_table[$print_table_row][15] = $ipoLog; $print_table[$print_table_row][16] = $pnaLog; $print_table[$print_table_row][17] = $routeLog; $print_table[$print_table_row][18] = $timingReport; $print_table[$print_table_row][19] = $congestionMap; close(IN); close(OUT); }sub printComments {open (OUT, ">>$outfile") || die "couldn't open file: $outfile\n";print OUT "</table>\n";print OUT "<font size=3><b><U>NOTE</U></b></font>\n";print OUT "<b>1.Legend</b>\n";print OUT " - Route QoR: final proto route (or global route) medium effort results\n";print OUT " Results are parsed from *_groute.log\n";print OUT " * total: total overflow\n";print OUT " * max: max overflow\n";print OUT " * %: percentage of GRC with overflow\n";print OUT " * wirelength: total wire length\n";print OUT " - Timing QoR: final timing results\n";print OUT " Results are parsed from *_final.qor\n";print OUT " * wns: WNS of clock group with worst WNS\n";print OUT " * tns: TNS of clock group with worst WNS\n";print OUT " * number: number of violations of clock group with worst WNS\n";print OUT " * clk: clock name of clock group with worst WNS\n";print OUT " * cell inst: final number of cell instances in the design (AFTER IPO)\n";print OUT " - DRC: final DRC results\n";print OUT " Results are parsed from *_final.qor\n";print OUT " * tran: total max transition violations\n";print OUT " * cap: total max capacitance violations\n";print OUT " - Power QoR: final power network analysis results (available only if power network synthesis is performed)\n";print OUT " Results are parsed from *_pna.log\n";print OUT " * gnd IR drop: maximum IR drop for \$MW_GROUND_NET\n";print OUT " * power IR drop: maximum IR drop for \$MW_POWER_NET\n";print OUT "\n";print OUT "<b>2.Steps in explore mode and correspondent outputs:</b>\n";print OUT "<b> All the following are saved in \$REPORTS_DIR</b>\n";print OUT " - fp_create_placement: *_place.log (shown as link in the table)\n";print OUT " - fp_proto_route: *_groute_after_place.log\n";print OUT " - report timing before fp_optimize (optional): *_fp_optimize_before.rpt\n";print OUT " - fp_optimize: *_ipo.log (shown as link in the table)\n";print OUT " - report timing after (optional): *_fp_optimize_after.rpt\n";print OUT " - fp_analyze_rail (after fp_synthesize_rail): *_pna.log (shown as link in the table)\n";print OUT " - final fp_proto_route: *_groute.log (shown as link in the table)\n";print OUT " - final report_timing: *_final.rpt (shown as link in the table)\n";print OUT " - final report_qor_snapshot: *_final.qor\n";print OUT "<b> All the following are saved in \$RESULTS_DIR</b>\n";print OUT " - write_floorplan -placement {io hard_macro soft_macro}: *_dump.floorplan\n";print OUT " - write_floorplan -preroute: *_dump.route\n";print OUT " - write_floorplan -all: *_dump.complete_floorplan\n";print OUT " - write_io_constraints -constraint_type side_order -io_only: *_dump.tdf\n";print OUT "\n";print OUT "<b>3.If you use explore mode,</b>\n";print OUT "<b> how to use explore run results and continue in ICC RM?</b>\n";print OUT " \n";print OUT " After explore mode is done, please review results in the HTML table and pick one result you like to continue ICC RM\n";print OUT " You can do this by either of the following 2 approaches depending on your preference:\n";print OUT " \n";print OUT " - Use the saved CEL from the run you like as starting point for ICC RM\n";print OUT " -> Please change variable ICC_FLOORPLAN_CEL in icc_setup.tcl to this CEL name\n";print OUT " * This CEL will contain fixed macro placement as well as In Place Optimization and Power Network Synthesis changes\n";print OUT " * ICC_FLOORPLAN_CEL is the variable which you specify the stating CEL of ICC RM\n";print OUT " \n";print OUT " - Use the dumped floorplan_file and routes from the run you like and load it to original CEL\n";print OUT " -> Open CEL saved_cel_before_explore_mode, load the dumped floorplan file and routes from the run you like\n";print OUT " -> save the CEL as for example, feasibility_dp and change ICC_FLOORPLAN_CEL to feasibility_dp\n";print OUT " * This approach ensures no netlist change and only macro placement and PG routes\n";print OUT " * saved_cel_before_explore_mode is the CEL saved before explore mode starts which is your clean starting point\n";print OUT " * the dumped floorplan file is in \$RESULTS_DIR, for ex, you can load it by:\n";print OUT " read_floorplan \$RESULTS_DIR/run0_default_dump.floorplan\n";print OUT " * the dumped route file is in \$RESULTS_DIR, for ex, you can load it by:\n";print OUT " read_floorplan \$RESULTS_DIR/run0_default_dump.route\n";print OUT " \n";close(OUT);}sub trimSpace{ my $string = shift; $string =~ s/^\s+//; #trim leading space $string =~ s/\s+$//; #trim ending space return $string;}sub usage{ print "*****************************************************************\n"; print "\nparseOneSetDesignLogs.pl -i <input directory> \n"; print " -o <output directory> \n"; print " -f <output fileName> \n"; print " -h for help\n"; print "Note that if anything of the arguments is not defined, it'll default to the current working directory\n"; print "\n"; print "Default output file name is: outfile.txt \n"; print "*****************************************************************\n";}
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