choose.v

来自「LCD显示」· Verilog 代码 · 共 23 行

module choose(cho,LCD_XX);

input    [2:0]cho;
output   [2:0]LCD_XX;

reg [4:0]LCD_XX;

always @(cho)

   begin
      case(cho)
         
        3'b000:LCD_XX=5'b00001;
        3'b001:LCD_XX=5'b00010;
        3'b010:LCD_XX=5'b00100;
        3'b011:LCD_XX=5'b01000;
        3'b100:LCD_XX=5'b10000;
      endcase
    end


endmodule