📄 dds_vhdl.tan.rpt
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; 10.748 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[21] ; REG32B:u2|DOUT[26] ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.072 ns ; 2.324 ns ;
; 10.748 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[21] ; REG32B:u2|DOUT[27] ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.072 ns ; 2.324 ns ;
; 10.748 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[21] ; REG32B:u2|DOUT[28] ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.072 ns ; 2.324 ns ;
; 10.748 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[21] ; REG32B:u2|DOUT[29] ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.072 ns ; 2.324 ns ;
; 10.748 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[21] ; REG32B:u2|DOUT[30] ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.072 ns ; 2.324 ns ;
; 10.748 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[23] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a7~porta_address_reg1 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.279 ns ;
; 10.752 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[22] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a4~porta_address_reg0 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.275 ns ;
; 10.755 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[23] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a4~porta_address_reg1 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.272 ns ;
; 10.763 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[31] ; REG10B:u5|DOUT[9] ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.072 ns ; 2.309 ns ;
; 10.765 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[25] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a9~porta_address_reg3 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.262 ns ;
; 10.769 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[24] ; REG10B:u5|DOUT[5] ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.072 ns ; 2.303 ns ;
; 10.771 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[28] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a9~porta_address_reg6 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.256 ns ;
; 10.774 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[30] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a9~porta_address_reg8 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.253 ns ;
; 10.778 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[29] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a7~porta_address_reg7 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.249 ns ;
; 10.779 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[24] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a9~porta_address_reg2 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.248 ns ;
; 10.787 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[31] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a7~porta_address_reg9 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.240 ns ;
; 10.788 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[31] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a9~porta_address_reg9 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.239 ns ;
; 10.790 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[24] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a7~porta_address_reg2 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.237 ns ;
; 10.793 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[20] ; REG32B:u2|DOUT[31] ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.072 ns ; 2.279 ns ;
; 10.793 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[29] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a9~porta_address_reg7 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.234 ns ;
; 10.793 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[28] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a7~porta_address_reg6 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.234 ns ;
; 10.797 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[25] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a7~porta_address_reg3 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.230 ns ;
; 10.800 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[25] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a4~porta_address_reg3 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.227 ns ;
; 10.802 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[25] ; REG32B:u2|DOUT[26] ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.072 ns ; 2.270 ns ;
; 10.802 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[25] ; REG32B:u2|DOUT[27] ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.072 ns ; 2.270 ns ;
; 10.802 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[25] ; REG32B:u2|DOUT[28] ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.072 ns ; 2.270 ns ;
; 10.802 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[25] ; REG32B:u2|DOUT[29] ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.072 ns ; 2.270 ns ;
; 10.802 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[25] ; REG32B:u2|DOUT[30] ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.072 ns ; 2.270 ns ;
; 10.803 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[26] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a7~porta_address_reg4 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.224 ns ;
; 10.809 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[27] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a7~porta_address_reg5 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.218 ns ;
; 10.811 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[26] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a9~porta_address_reg4 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.216 ns ;
; 10.812 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[27] ; REG32B:u2|DOUT[31] ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.072 ns ; 2.260 ns ;
; 10.823 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[24] ; sin_rom:u6|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a4~porta_address_reg2 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.027 ns ; 2.204 ns ;
; 10.831 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG10B:u5|DOUT[0] ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a6~porta_address_reg0 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.066 ns ; 2.235 ns ;
; 10.844 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG10B:u5|DOUT[1] ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a6~porta_address_reg1 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.066 ns ; 2.222 ns ;
; 10.846 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG10B:u5|DOUT[1] ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a9~porta_address_reg1 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.066 ns ; 2.220 ns ;
; 10.849 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[24] ; REG10B:u5|DOUT[4] ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.072 ns ; 2.223 ns ;
; 10.853 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG10B:u5|DOUT[0] ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_m9t:auto_generated|altsyncram_t5b2:altsyncram1|ram_block3a9~porta_address_reg0 ; PLL20:u7|altpll:altpll_component|_clk0 ; PLL20:u7|altpll:altpll_component|_clk0 ; 13.333 ns ; 13.066 ns ; 2.213 ns ;
; 10.870 ns ; Restricted to 275.03 MHz ( period = 3.64 ns ) ; REG32B:u2|DOUT[20] ⌨️ 快捷键说明
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