serial.fit.eqn

-- 本模块的功能是验证实现和PC机进行基本的串口通信的功能。需要在 --PC机上安装一个串口调试工具来验证程序的功能。 -- 程序实现了一个收发一帧10个bit（即无奇偶校验位）的串口控 --

B1L85 = B1_send_state[2] & (!B1_send_state[1]) # !B1_send_state[2] & (B1_send_state[1] # !B1_send_state[0]) # !B1_state_tras[1];


--B1L134 is serial_test:inst|txd_buf[2]~2386 at LC_X14_Y8_N7
--operation mode is normal

B1L134 = !B1_state_tras[1] & (B1_state_tras[2] # !B1_state_tras[0]) # !B1_state_tras[3];


--B1_txd_buf[1] is serial_test:inst|txd_buf[1] at LC_X14_Y8_N8
--operation mode is normal

B1_txd_buf[1]_lut_out = B1L87 & !B1L86 & (B1_txd_buf[2] # !B1L134) # !B1L87 & (B1_txd_buf[2] # !B1L134);
B1_txd_buf[1] = DFFEAS(B1_txd_buf[1]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , B1L136, , , , );


--B1L135 is serial_test:inst|txd_buf[2]~2387 at LC_X14_Y8_N5
--operation mode is normal

B1L135 = B1_state_tras[0] & B1_state_tras[3] & (B1_state_tras[2] $ B1_state_tras[1]) # !B1_state_tras[0] & (B1_state_tras[3] $ (!B1_state_tras[2] & !B1_state_tras[1]));


--B1_div_reg[14] is serial_test:inst|div_reg[14] at LC_X12_Y6_N8
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_div_reg[14]_lut_out = GND;
B1_div_reg[14] = DFFEAS(B1_div_reg[14]_lut_out, GLOBAL(clk), GLOBAL(reset), , , B1L4, , , VCC);


--B1_div_reg[13] is serial_test:inst|div_reg[13] at LC_X12_Y6_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_div_reg[13]_lut_out = GND;
B1_div_reg[13] = DFFEAS(B1_div_reg[13]_lut_out, GLOBAL(clk), GLOBAL(reset), , , B1L7, , , VCC);


--B1_div_reg[12] is serial_test:inst|div_reg[12] at LC_X13_Y6_N2
--operation mode is normal

B1_div_reg[12]_lut_out = B1L10;
B1_div_reg[12] = DFFEAS(B1_div_reg[12]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1L74 is serial_test:inst|Equal~277 at LC_X13_Y6_N5
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_div_reg[15]_qfbk = B1_div_reg[15];
B1L74 = !B1_div_reg[13] & !B1_div_reg[12] & !B1_div_reg[15]_qfbk & !B1_div_reg[14];

--B1_div_reg[15] is serial_test:inst|div_reg[15] at LC_X13_Y6_N5
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_div_reg[15] = DFFEAS(B1L74, GLOBAL(clk), GLOBAL(reset), , , B1L3, , , VCC);


--B1_div_reg[10] is serial_test:inst|div_reg[10] at LC_X13_Y6_N9
--operation mode is normal

B1_div_reg[10]_lut_out = B1L15;
B1_div_reg[10] = DFFEAS(B1_div_reg[10]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1_div_reg[9] is serial_test:inst|div_reg[9] at LC_X11_Y6_N1
--operation mode is normal

B1_div_reg[9]_lut_out = B1L18;
B1_div_reg[9] = DFFEAS(B1_div_reg[9]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1_div_reg[8] is serial_test:inst|div_reg[8] at LC_X13_Y6_N6
--operation mode is normal

B1_div_reg[8]_lut_out = B1L21;
B1_div_reg[8] = DFFEAS(B1_div_reg[8]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1L75 is serial_test:inst|Equal~278 at LC_X11_Y6_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_div_reg[11]_qfbk = B1_div_reg[11];
B1L75 = !B1_div_reg[9] & !B1_div_reg[8] & !B1_div_reg[11]_qfbk & !B1_div_reg[10];

--B1_div_reg[11] is serial_test:inst|div_reg[11] at LC_X11_Y6_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_div_reg[11] = DFFEAS(B1L75, GLOBAL(clk), GLOBAL(reset), , , B1L12, , , VCC);


--B1_div_reg[4] is serial_test:inst|div_reg[4] at LC_X10_Y6_N7
--operation mode is normal

B1_div_reg[4]_lut_out = B1L24 & !B1L78;
B1_div_reg[4] = DFFEAS(B1_div_reg[4]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1_div_reg[6] is serial_test:inst|div_reg[6] at LC_X10_Y6_N8
--operation mode is normal

B1_div_reg[6]_lut_out = B1L29;
B1_div_reg[6] = DFFEAS(B1_div_reg[6]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1_div_reg[5] is serial_test:inst|div_reg[5] at LC_X10_Y6_N5
--operation mode is normal

B1_div_reg[5]_lut_out = B1L32;
B1_div_reg[5] = DFFEAS(B1_div_reg[5]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1L76 is serial_test:inst|Equal~279 at LC_X10_Y6_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_div_reg[7]_qfbk = B1_div_reg[7];
B1L76 = !B1_div_reg[5] & B1_div_reg[4] & !B1_div_reg[7]_qfbk & !B1_div_reg[6];

--B1_div_reg[7] is serial_test:inst|div_reg[7] at LC_X10_Y6_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_div_reg[7] = DFFEAS(B1L76, GLOBAL(clk), GLOBAL(reset), , , B1L27, , , VCC);


--B1_div_reg[3] is serial_test:inst|div_reg[3] at LC_X10_Y6_N4
--operation mode is normal

B1_div_reg[3]_lut_out = B1L35 & (!B1L78);
B1_div_reg[3] = DFFEAS(B1_div_reg[3]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1_div_reg[1] is serial_test:inst|div_reg[1] at LC_X10_Y6_N6
--operation mode is normal

B1_div_reg[1]_lut_out = B1L38 & !B1L78;
B1_div_reg[1] = DFFEAS(B1_div_reg[1]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1_div_reg[0] is serial_test:inst|div_reg[0] at LC_X10_Y6_N2
--operation mode is normal

B1_div_reg[0]_lut_out = B1L43 & !B1L78;
B1_div_reg[0] = DFFEAS(B1_div_reg[0]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1L77 is serial_test:inst|Equal~280 at LC_X10_Y6_N1
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_div_reg[2]_qfbk = B1_div_reg[2];
B1L77 = !B1_div_reg[0] & B1_div_reg[1] & !B1_div_reg[2]_qfbk & B1_div_reg[3];

--B1_div_reg[2] is serial_test:inst|div_reg[2] at LC_X10_Y6_N1
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_div_reg[2] = DFFEAS(B1L77, GLOBAL(clk), GLOBAL(reset), , , B1L41, , , VCC);


--B1L78 is serial_test:inst|Equal~281 at LC_X10_Y6_N3
--operation mode is normal

B1L78 = B1L74 & B1L77 & B1L76 & B1L75;


--B1_rxd_reg1 is serial_test:inst|rxd_reg1 at LC_X16_Y8_N2
--operation mode is normal

B1_rxd_reg1_lut_out = rxd_usb;
B1_rxd_reg1 = DFFEAS(B1_rxd_reg1_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1_recstart is serial_test:inst|recstart at LC_X2_Y6_N2
--operation mode is normal

B1_recstart_lut_out = B1_recstart & (B1L91 # B1L79 & B1_recstart_tmp) # !B1_recstart & B1L79 & B1_recstart_tmp;
B1_recstart = DFFEAS(B1_recstart_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1L113 is serial_test:inst|state_rec[1]~865 at LC_X2_Y5_N6
--operation mode is normal

B1L113 = B1_state_rec[3] & (!B1L73 # !B1_div8_rec_reg[1]) # !B1_state_rec[3] & !B1_div8_rec_reg[1] & (B1_state_rec[0] # !B1L73);


--B1L79 is serial_test:inst|Equal~282 at LC_X2_Y5_N2
--operation mode is normal

B1L79 = !B1_state_rec[3] & !B1_state_rec[1] & !B1_state_rec[2] & !B1_state_rec[0];


--B1_recstart_tmp is serial_test:inst|recstart_tmp at LC_X2_Y6_N5
--operation mode is normal

B1_recstart_tmp_lut_out = B1_recstart_tmp & (!B1L79) # !B1_recstart_tmp & B1_rxd_reg2 & !B1_rxd_reg1 & B1L79;
B1_recstart_tmp = DFFEAS(B1_recstart_tmp_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1L114 is serial_test:inst|state_rec[1]~866 at LC_X2_Y5_N3
--operation mode is normal

B1L114 = B1L79 & (!B1_recstart_tmp) # !B1L79 & (!B1_div8_rec_reg[2] # !B1_div8_rec_reg[0]);


--B1L115 is serial_test:inst|state_rec[1]~867 at LC_X2_Y5_N7
--operation mode is normal

B1L115 = B1L113 # B1L114;


--B1L1 is serial_test:inst|add~596 at LC_X2_Y5_N1
--operation mode is normal

B1L1 = B1_state_rec[0] & B1_state_rec[1];


--B1L118 is serial_test:inst|state_rec~868 at LC_X1_Y5_N7
--operation mode is normal

B1L118 = B1_state_rec[3] & (B1_state_rec[0] # B1_state_rec[1] # B1_state_rec[2]);


--B1L2 is serial_test:inst|add~597 at LC_X1_Y5_N9
--operation mode is normal

B1L2 = B1_state_rec[0] & B1_state_rec[1] & (B1_state_rec[2]);


--B1L86 is serial_test:inst|Mux~2294 at LC_X13_Y8_N6
--operation mode is normal

B1L86 = B1_state_tras[3] & B1_state_tras[1];


--B1L87 is serial_test:inst|Mux~2295 at LC_X15_Y8_N0
--operation mode is normal

B1L87 = B1_send_state[1] & (!B1_send_state[2]);


--B1_txd_buf[2] is serial_test:inst|txd_buf[2] at LC_X14_Y8_N0
--operation mode is normal

B1_txd_buf[2]_lut_out = B1L134 & !B1_txd_buf[3] # !B1L134 & (!B1L88);
B1_txd_buf[2] = DFFEAS(B1_txd_buf[2]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , B1L136, , , , );


--B1L3 is serial_test:inst|add~598 at LC_X12_Y6_N7
--operation mode is normal

B1L3_carry_eqn = (!B1L11 & B1L5) # (B1L11 & B1L6);
B1L3 = B1L3_carry_eqn $ B1_div_reg[15];


--B1L4 is serial_test:inst|add~603 at LC_X12_Y6_N6
--operation mode is arithmetic

B1L4_carry_eqn = (!B1L11 & B1L8) # (B1L11 & B1L9);
B1L4 = B1_div_reg[14] $ (!B1L4_carry_eqn);

--B1L5 is serial_test:inst|add~605 at LC_X12_Y6_N6
--operation mode is arithmetic

B1L5_cout_0 = B1_div_reg[14] & (!B1L8);
B1L5 = CARRY(B1L5_cout_0);

--B1L6 is serial_test:inst|add~605COUT1_714 at LC_X12_Y6_N6
--operation mode is arithmetic

B1L6_cout_1 = B1_div_reg[14] & (!B1L9);
B1L6 = CARRY(B1L6_cout_1);


--B1L7 is serial_test:inst|add~608 at LC_X12_Y6_N5
--operation mode is arithmetic

B1L7_carry_eqn = B1L11;
B1L7 = B1_div_reg[13] $ B1L7_carry_eqn;

--B1L8 is serial_test:inst|add~610 at LC_X12_Y6_N5
--operation mode is arithmetic

B1L8_cout_0 = !B1L11 # !B1_div_reg[13];
B1L8 = CARRY(B1L8_cout_0);

--B1L9 is serial_test:inst|add~610COUT1_712 at LC_X12_Y6_N5
--operation mode is arithmetic

B1L9_cout_1 = !B1L11 # !B1_div_reg[13];
B1L9 = CARRY(B1L9_cout_1);


--B1L10 is serial_test:inst|add~613 at LC_X12_Y6_N4
--operation mode is arithmetic

B1L10_carry_eqn = (!B1L28 & B1L13) # (B1L28 & B1L14);
B1L10 = B1_div_reg[12] $ !B1L10_carry_eqn;

--B1L11 is serial_test:inst|add~615 at LC_X12_Y6_N4
--operation mode is arithmetic

B1L11 = CARRY(B1_div_reg[12] & !B1L14);


--B1L12 is serial_test:inst|add~618 at LC_X12_Y6_N3
--operation mode is arithmetic

B1L12_carry_eqn = (!B1L28 & B1L16) # (B1L28 & B1L17);
B1L12 = B1_div_reg[11] $ (B1L12_carry_eqn);

--B1L13 is serial_test:inst|add~620 at LC_X12_Y6_N3
--operation mode is arithmetic

B1L13_cout_0 = !B1L16 # !B1_div_reg[11];
B1L13 = CARRY(B1L13_cout_0);

--B1L14 is serial_test:inst|add~620COUT1_710 at LC_X12_Y6_N3
--operation mode is arithmetic

B1L14_cout_1 = !B1L17 # !B1_div_reg[11];
B1L14 = CARRY(B1L14_cout_1);


--B1L15 is serial_test:inst|add~623 at LC_X12_Y6_N2
--operation mode is arithmetic

B1L15_carry_eqn = (!B1L28 & B1L19) # (B1L28 & B1L20);
B1L15 = B1_div_reg[10] $ !B1L15_carry_eqn;

--B1L16 is serial_test:inst|add~625 at LC_X12_Y6_N2
--operation mode is arithmetic

B1L16_cout_0 = B1_div_reg[10] & !B1L19;