serial.fit.eqn

-- 本模块的功能是验证实现和PC机进行基本的串口通信的功能。需要在 --PC机上安装一个串口调试工具来验证程序的功能。 -- 程序实现了一个收发一帧10个bit（即无奇偶校验位）的串口控 --

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--B1_txd_reg is serial_test:inst|txd_reg at LC_X13_Y8_N1
--operation mode is normal

B1_txd_reg_lut_out = B1L72 & !B1L149 & (B1_txd_reg # !B1L146) # !B1L72 & B1_txd_reg;
B1_txd_reg = DFFEAS(B1_txd_reg_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1_rxd_buf[7] is serial_test:inst|rxd_buf[7] at LC_X1_Y6_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_rxd_buf[7]_lut_out = GND;
B1_rxd_buf[7] = DFFEAS(B1_rxd_buf[7]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , B1L102, B1_rxd_reg2, , , VCC);


--B1_rxd_buf[6] is serial_test:inst|rxd_buf[6] at LC_X1_Y6_N7
--operation mode is normal

B1_rxd_buf[6]_lut_out = B1_rxd_buf[7];
B1_rxd_buf[6] = DFFEAS(B1_rxd_buf[6]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , B1L102, , , , );


--B1_rxd_buf[5] is serial_test:inst|rxd_buf[5] at LC_X1_Y6_N4
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_rxd_buf[5]_lut_out = GND;
B1_rxd_buf[5] = DFFEAS(B1_rxd_buf[5]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , B1L102, B1_rxd_buf[6], , , VCC);


--B1_rxd_buf[4] is serial_test:inst|rxd_buf[4] at LC_X1_Y6_N3
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_rxd_buf[4]_lut_out = GND;
B1_rxd_buf[4] = DFFEAS(B1_rxd_buf[4]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , B1L102, B1_rxd_buf[5], , , VCC);


--B1_rxd_buf[3] is serial_test:inst|rxd_buf[3] at LC_X1_Y5_N4
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_rxd_buf[3]_lut_out = GND;
B1_rxd_buf[3] = DFFEAS(B1_rxd_buf[3]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , B1L102, B1_rxd_buf[4], , , VCC);


--B1_rxd_buf[2] is serial_test:inst|rxd_buf[2] at LC_X1_Y5_N3
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_rxd_buf[2]_lut_out = GND;
B1_rxd_buf[2] = DFFEAS(B1_rxd_buf[2]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , B1L102, B1_rxd_buf[3], , , VCC);


--B1_rxd_buf[1] is serial_test:inst|rxd_buf[1] at LC_X1_Y5_N6
--operation mode is normal

B1_rxd_buf[1]_lut_out = B1_rxd_buf[2];
B1_rxd_buf[1] = DFFEAS(B1_rxd_buf[1]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , B1L102, , , , );


--B1_rxd_buf[0] is serial_test:inst|rxd_buf[0] at LC_X1_Y4_N7
--operation mode is normal

B1_rxd_buf[0]_lut_out = B1_rxd_buf[1];
B1_rxd_buf[0] = DFFEAS(B1_rxd_buf[0]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , B1L102, , , , );


--B1_div8_tras_reg[2] is serial_test:inst|div8_tras_reg[2] at LC_X14_Y7_N6
--operation mode is normal

B1_div8_tras_reg[2]_lut_out = B1_div8_tras_reg[2] $ (B1_div8_tras_reg[1] & B1_div8_tras_reg[0] & B1_trasstart);
B1_div8_tras_reg[2] = DFFEAS(B1_div8_tras_reg[2]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1_div8_tras_reg[1] is serial_test:inst|div8_tras_reg[1] at LC_X14_Y7_N3
--operation mode is normal

B1_div8_tras_reg[1]_lut_out = B1_div8_tras_reg[1] $ (B1_trasstart & B1_div8_tras_reg[0]);
B1_div8_tras_reg[1] = DFFEAS(B1_div8_tras_reg[1]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1_div8_tras_reg[0] is serial_test:inst|div8_tras_reg[0] at LC_X14_Y7_N0
--operation mode is normal

B1_div8_tras_reg[0]_lut_out = B1_div8_tras_reg[0] $ B1_trasstart;
B1_div8_tras_reg[0] = DFFEAS(B1_div8_tras_reg[0]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1L72 is serial_test:inst|Equal~275 at LC_X14_Y7_N7
--operation mode is normal

B1L72 = B1_div8_tras_reg[0] & B1_div8_tras_reg[2] & B1_div8_tras_reg[1];


--B1_state_tras[3] is serial_test:inst|state_tras[3] at LC_X14_Y9_N7
--operation mode is normal

B1_state_tras[3]_lut_out = B1_state_tras[3] $ (B1_state_tras[2] & B1L80 & B1L72);
B1_state_tras[3] = DFFEAS(B1_state_tras[3]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1_state_tras[2] is serial_test:inst|state_tras[2] at LC_X13_Y8_N2
--operation mode is normal

B1_state_tras[2]_lut_out = B1_state_tras[2] $ (B1_state_tras[1] & B1L72 & B1_state_tras[0]);
B1_state_tras[2] = DFFEAS(B1_state_tras[2]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1_state_tras[1] is serial_test:inst|state_tras[1] at LC_X13_Y9_N7
--operation mode is normal

B1_state_tras[1]_lut_out = B1_state_tras[1] $ (B1_state_tras[0] & B1L72);
B1_state_tras[1] = DFFEAS(B1_state_tras[1]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1_state_tras[0] is serial_test:inst|state_tras[0] at LC_X13_Y9_N6
--operation mode is normal

B1_state_tras[0]_lut_out = B1_state_tras[0] & (!B1L72) # !B1_state_tras[0] & B1L72 & (B1_state_tras[1] # B1L81);
B1_state_tras[0] = DFFEAS(B1_state_tras[0]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1L125 is serial_test:inst|trasstart~473 at LC_X13_Y9_N5
--operation mode is normal

B1L125 = !B1_state_tras[3] & !B1_state_tras[1] & !B1_state_tras[0] & !B1_state_tras[2];


--B1_send_state[0] is serial_test:inst|send_state[0] at LC_X14_Y9_N3
--operation mode is normal

B1_send_state[0]_lut_out = B1_send_state[0] $ (B1L80 & B1L82 & B1L72);
B1_send_state[0] = DFFEAS(B1_send_state[0]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1_send_state[2] is serial_test:inst|send_state[2] at LC_X14_Y9_N2
--operation mode is normal

B1_send_state[2]_lut_out = B1_send_state[2] $ (B1_send_state[1] & (B1L108));
B1_send_state[2] = DFFEAS(B1_send_state[2]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1_send_state[1] is serial_test:inst|send_state[1] at LC_X14_Y9_N6
--operation mode is normal

B1_send_state[1]_lut_out = B1_send_state[1] $ B1L108;
B1_send_state[1] = DFFEAS(B1_send_state[1]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1L145 is serial_test:inst|txd_reg~769 at LC_X14_Y9_N0
--operation mode is normal

B1L145 = B1_send_state[2] & B1_send_state[1] & B1_send_state[0];


--B1_trasstart is serial_test:inst|trasstart at LC_X13_Y9_N2
--operation mode is normal

B1_trasstart_lut_out = B1L127 # B1L129 # B1_trasstart & B1L83;
B1_trasstart = DFFEAS(B1_trasstart_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1L146 is serial_test:inst|txd_reg~770 at LC_X13_Y8_N0
--operation mode is normal

B1L146 = B1L125 & (B1L145 # !B1_trasstart);


--B1_txd_buf[0] is serial_test:inst|txd_buf[0] at LC_X14_Y8_N2
--operation mode is normal

B1_txd_buf[0]_lut_out = B1L134 & B1_txd_buf[1] # !B1L134 & (!B1L85);
B1_txd_buf[0] = DFFEAS(B1_txd_buf[0]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , B1L136, , , , );


--B1L147 is serial_test:inst|txd_reg~771 at LC_X13_Y8_N4
--operation mode is normal

B1L147 = B1_state_tras[3] $ (B1_state_tras[1] # B1_txd_buf[0] # B1_state_tras[2]);


--B1L148 is serial_test:inst|txd_reg~772 at LC_X13_Y8_N3
--operation mode is normal

B1L148 = B1_state_tras[3] & (B1_state_tras[1] # B1_state_tras[2]) # !B1_state_tras[3] & (B1_txd_buf[0]);


--B1L149 is serial_test:inst|txd_reg~773 at LC_X13_Y8_N5
--operation mode is normal

B1L149 = B1L147 & (!B1L148) # !B1L147 & (B1L148 & !B1_txd_reg # !B1L148 & (B1_state_tras[0]));


--B1_clkbaud8x is serial_test:inst|clkbaud8x at LC_X10_Y6_N9
--operation mode is normal

B1_clkbaud8x_lut_out = B1_clkbaud8x $ (B1L78);
B1_clkbaud8x = DFFEAS(B1_clkbaud8x_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1_rxd_reg2 is serial_test:inst|rxd_reg2 at LC_X2_Y6_N6
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_rxd_reg2_lut_out = GND;
B1_rxd_reg2 = DFFEAS(B1_rxd_reg2_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , B1_rxd_reg1, , , VCC);


--B1_div8_rec_reg[2] is serial_test:inst|div8_rec_reg[2] at LC_X1_Y5_N1
--operation mode is normal

B1_div8_rec_reg[2]_lut_out = B1_div8_rec_reg[2] $ (B1_div8_rec_reg[1] & B1_div8_rec_reg[0] & B1_recstart);
B1_div8_rec_reg[2] = DFFEAS(B1_div8_rec_reg[2]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1_div8_rec_reg[1] is serial_test:inst|div8_rec_reg[1] at LC_X1_Y5_N2
--operation mode is normal

B1_div8_rec_reg[1]_lut_out = B1_div8_rec_reg[1] $ (B1_div8_rec_reg[0] & B1_recstart);
B1_div8_rec_reg[1] = DFFEAS(B1_div8_rec_reg[1]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1_div8_rec_reg[0] is serial_test:inst|div8_rec_reg[0] at LC_X1_Y5_N5
--operation mode is normal

B1_div8_rec_reg[0]_lut_out = B1_div8_rec_reg[0] $ B1_recstart;
B1_div8_rec_reg[0] = DFFEAS(B1_div8_rec_reg[0]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1L101 is serial_test:inst|rxd_buf[7]~254 at LC_X1_Y5_N0
--operation mode is normal

B1L101 = B1_div8_rec_reg[2] & B1_div8_rec_reg[0] & B1_div8_rec_reg[1];


--B1_state_rec[2] is serial_test:inst|state_rec[2] at LC_X2_Y5_N5
--operation mode is normal

B1_state_rec[2]_lut_out = B1L115 & (B1_state_rec[2]) # !B1L115 & !B1L118 & (B1L1 $ B1_state_rec[2]);
B1_state_rec[2] = DFFEAS(B1_state_rec[2]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1_state_rec[1] is serial_test:inst|state_rec[1] at LC_X2_Y5_N9
--operation mode is normal

B1_state_rec[1]_lut_out = B1L115 & (B1_state_rec[1]) # !B1L115 & !B1L118 & (B1_state_rec[0] $ B1_state_rec[1]);
B1_state_rec[1] = DFFEAS(B1_state_rec[1]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1L73 is serial_test:inst|Equal~276 at LC_X2_Y5_N4
--operation mode is normal

B1L73 = !B1_state_rec[2] & !B1_state_rec[1];


--B1_state_rec[0] is serial_test:inst|state_rec[0] at LC_X2_Y5_N0
--operation mode is normal

B1_state_rec[0]_lut_out = B1_state_rec[0] & (B1L113 # B1L114) # !B1_state_rec[0] & !B1L118 & !B1L113 & !B1L114;
B1_state_rec[0] = DFFEAS(B1_state_rec[0]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1_state_rec[3] is serial_test:inst|state_rec[3] at LC_X2_Y5_N8
--operation mode is normal

B1_state_rec[3]_lut_out = B1L115 & B1_state_rec[3] # !B1L115 & !B1L118 & (B1_state_rec[3] $ B1L2);
B1_state_rec[3] = DFFEAS(B1_state_rec[3]_lut_out, GLOBAL(B1_clkbaud8x), GLOBAL(reset), , , , , , );


--B1L102 is serial_test:inst|rxd_buf[7]~255 at LC_X1_Y5_N8
--operation mode is normal

B1L102 = B1L101 & (B1_state_rec[3] $ (B1_state_rec[0] # !B1L73));


--B1L80 is serial_test:inst|Mux~2284 at LC_X14_Y9_N9
--operation mode is normal

B1L80 = B1_state_tras[0] & B1_state_tras[1];


--B1L81 is serial_test:inst|Mux~2287 at LC_X13_Y9_N8
--operation mode is normal

B1L81 = B1_state_tras[2] # B1_state_tras[3] # B1_trasstart & !B1L145;


--B1L82 is serial_test:inst|Mux~2289 at LC_X14_Y9_N4
--operation mode is normal

B1L82 = B1_state_tras[3] & B1_state_tras[2];


--B1L108 is serial_test:inst|send_state[1]~364 at LC_X14_Y9_N1
--operation mode is normal

B1L108 = B1_send_state[0] & B1L80 & B1L82 & B1L72;


--B1L83 is serial_test:inst|Mux~2290 at LC_X13_Y9_N9
--operation mode is normal

B1L83 = B1_state_tras[3] & !B1_state_tras[1] & (!B1_state_tras[2]) # !B1_state_tras[3] & (B1_state_tras[1] # B1_state_tras[0] # B1_state_tras[2]);


--B1L126 is serial_test:inst|trasstart~474 at LC_X13_Y9_N3
--operation mode is normal

B1L126 = B1L125 & (B1_trasstart # !B1L145 & !B1L83);


--B1L84 is serial_test:inst|Mux~2291 at LC_X13_Y9_N4
--operation mode is normal

B1L84 = B1_state_tras[3] & (!B1_state_tras[2]);


--B1L127 is serial_test:inst|trasstart~475 at LC_X13_Y9_N0
--operation mode is normal

B1L127 = B1L126 # B1_state_tras[1] & B1_trasstart & B1L84;


--B1L85 is serial_test:inst|Mux~2292 at LC_X14_Y9_N8
--operation mode is normal