edge.map.qmsg

图像处理中边缘检测的VHDL源代码,所用的算法是garbor变换

{ "Info" "ISGN_MEGAFN_PARAM_TOP" "edgewen:inst\|lpm_mult:lpm_multe " "Info: Instantiated megafunction \"edgewen:inst\|lpm_mult:lpm_multe\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_hint MAXIMIZE_SPEED=5 " "Info: Parameter \"lpm_hint\" = \"MAXIMIZE_SPEED=5\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_representation SIGNED " "Info: Parameter \"lpm_representation\" = \"SIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type LPM_MULT " "Info: Parameter \"lpm_type\" = \"LPM_MULT\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_widtha 11 " "Info: Parameter \"lpm_widtha\" = \"11\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_widthb 11 " "Info: Parameter \"lpm_widthb\" = \"11\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_widthp 22 " "Info: Parameter \"lpm_widthp\" = \"22\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0}  } { { "edgewen.v" "" { Text "F:/sopc/lunwen/edge/edgewen.v" 112 0 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mult_o3n.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mult_o3n.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mult_o3n " "Info: Found entity 1: mult_o3n" {  } { { "db/mult_o3n.tdf" "" { Text "F:/sopc/lunwen/edge/db/mult_o3n.tdf" 28 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "mult_o3n edgewen:inst\|lpm_mult:lpm_multe\|mult_o3n:auto_generated " "Info: Elaborating entity \"mult_o3n\" for hierarchy \"edgewen:inst\|lpm_mult:lpm_multe\|mult_o3n:auto_generated\"" {  } { { "lpm_mult.tdf" "auto_generated" { Text "c:/altera/81/quartus/libraries/megafunctions/lpm_mult.tdf" 375 4 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_mult edgewen:inst\|lpm_mult:lpm_multe1 " "Info: Elaborating entity \"lpm_mult\" for hierarchy \"edgewen:inst\|lpm_mult:lpm_multe1\"" {  } { { "edgewen.v" "lpm_multe1" { Text "F:/sopc/lunwen/edge/edgewen.v" 121 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "edgewen:inst\|lpm_mult:lpm_multe1 " "Info: Elaborated megafunction instantiation \"edgewen:inst\|lpm_mult:lpm_multe1\"" {  } { { "edgewen.v" "" { Text "F:/sopc/lunwen/edge/edgewen.v" 121 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "edgewen:inst\|lpm_mult:lpm_multe1 " "Info: Instantiated megafunction \"edgewen:inst\|lpm_mult:lpm_multe1\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_widtha 11 " "Info: Parameter \"lpm_widtha\" = \"11\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_widthb 11 " "Info: Parameter \"lpm_widthb\" = \"11\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_widths 11 " "Info: Parameter \"lpm_widths\" = \"11\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_widthp 22 " "Info: Parameter \"lpm_widthp\" = \"22\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_representation SIGNED " "Info: Parameter \"lpm_representation\" = \"SIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0}  } { { "edgewen.v" "" { Text "F:/sopc/lunwen/edge/edgewen.v" 121 0 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mult_com.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mult_com.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mult_com " "Info: Found entity 1: mult_com" {  } { { "db/mult_com.tdf" "" { Text "F:/sopc/lunwen/edge/db/mult_com.tdf" 28 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "mult_com edgewen:inst\|lpm_mult:lpm_multe1\|mult_com:auto_generated " "Info: Elaborating entity \"mult_com\" for hierarchy \"edgewen:inst\|lpm_mult:lpm_multe1\|mult_com:auto_generated\"" {  } { { "lpm_mult.tdf" "auto_generated" { Text "c:/altera/81/quartus/libraries/megafunctions/lpm_mult.tdf" 375 4 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_add_sub edgewen:inst\|lpm_add_sub:lpm_add_sub3 " "Info: Elaborating entity \"lpm_add_sub\" for hierarchy \"edgewen:inst\|lpm_add_sub:lpm_add_sub3\"" {  } { { "edgewen.v" "lpm_add_sub3" { Text "F:/sopc/lunwen/edge/edgewen.v" 135 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "edgewen:inst\|lpm_add_sub:lpm_add_sub3 " "Info: Elaborated megafunction instantiation \"edgewen:inst\|lpm_add_sub:lpm_add_sub3\"" {  } { { "edgewen.v" "" { Text "F:/sopc/lunwen/edge/edgewen.v" 135 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "edgewen:inst\|lpm_add_sub:lpm_add_sub3 " "Info: Instantiated megafunction \"edgewen:inst\|lpm_add_sub:lpm_add_sub3\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_width 22 " "Info: Parameter \"lpm_width\" = \"22\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_representation SIGNED " "Info: Parameter \"lpm_representation\" = \"SIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_direction SUB " "Info: Parameter \"lpm_direction\" = \"SUB\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0}  } { { "edgewen.v" "" { Text "F:/sopc/lunwen/edge/edgewen.v" 135 0 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/add_sub_3te.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/add_sub_3te.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 add_sub_3te " "Info: Found entity 1: add_sub_3te" {  } { { "db/add_sub_3te.tdf" "" { Text "F:/sopc/lunwen/edge/db/add_sub_3te.tdf" 22 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "add_sub_3te edgewen:inst\|lpm_add_sub:lpm_add_sub3\|add_sub_3te:auto_generated " "Info: Elaborating entity \"add_sub_3te\" for hierarchy \"edgewen:inst\|lpm_add_sub:lpm_add_sub3\|add_sub_3te:auto_generated\"" {  } { { "lpm_add_sub.tdf" "auto_generated" { Text "c:/altera/81/quartus/libraries/megafunctions/lpm_add_sub.tdf" 119 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Warning" "WSGN_WIDTH_MISMATCH_INPUT_PORT_TOO_NARROW" "dataa lpm_add_sub3 23 22 " "Warning (12020): Port \"dataa\" on the entity instantiation of \"lpm_add_sub3\" is connected to a signal of width 23. The formal width of the signal in the module is 22.  The extra bits will be ignored." {  } { { "edgewen.v" "lpm_add_sub3" { Text "F:/sopc/lunwen/edge/edgewen.v" 135 0 0 } }  } 0 12020 "Port \"%1!s!\" on the entity instantiation of \"%2!s!\" is connected to a signal of width %3!d!. The formal width of the signal in the module is %4!d!.  The extra bits will be ignored." 0 0 "" 0 0}
{ "Warning" "WSGN_WIDTH_MISMATCH_INPUT_PORT_TOO_NARROW" "datab lpm_add_sub3 23 22 " "Warning (12020): Port \"datab\" on the entity instantiation of \"lpm_add_sub3\" is connected to a signal of width 23. The formal width of the signal in the module is 22.  The extra bits will be ignored." {  } { { "edgewen.v" "lpm_add_sub3" { Text "F:/sopc/lunwen/edge/edgewen.v" 135 0 0 } }  } 0 12020 "Port \"%1!s!\" on the entity instantiation of \"%2!s!\" is connected to a signal of width %3!d!. The formal width of the signal in the module is %4!d!.  The extra bits will be ignored." 0 0 "" 0 0}
{ "Warning" "WSGN_WIDTH_MISMATCH_OUTPUT_PORT" "result lpm_multe2 23 22 " "Warning (12030): Port \"result\" on the entity instantiation of \"lpm_multe2\" is connected to a signal of width 23. The formal width of the signal in the module is 22.  The extra bits will be left dangling without any fan-out logic." {  } { { "edgewen.v" "lpm_multe2" { Text "F:/sopc/lunwen/edge/edgewen.v" 128 0 0 } }  } 0 12030 "Port \"%1!s!\" on the entity instantiation of \"%2!s!\" is connected to a signal of width %3!d!. The formal width of the signal in the module is %4!d!.  The extra bits will be left dangling without any fan-out logic." 0 0 "" 0 0}
{ "Warning" "WSGN_WIDTH_MISMATCH_OUTPUT_PORT" "result lpm_multe1 23 22 " "Warning (12030): Port \"result\" on the entity instantiation of \"lpm_multe1\" is connected to a signal of width 23. The formal width of the signal in the module is 22.  The extra bits will be left dangling without any fan-out logic." {  } { { "edgewen.v" "lpm_multe1" { Text "F:/sopc/lunwen/edge/edgewen.v" 121 0 0 } }  } 0 12030 "Port \"%1!s!\" on the entity instantiation of \"%2!s!\" is connected to a signal of width %3!d!. The formal width of the signal in the module is %4!d!.  The extra bits will be left dangling without any fan-out logic." 0 0 "" 0 0}
{ "Warning" "WSGN_WIDTH_MISMATCH_OUTPUT_PORT" "result lpm_multe 23 22 " "Warning (12030): Port \"result\" on the entity instantiation of \"lpm_multe\" is connected to a signal of width 23. The formal width of the signal in the module is 22.  The extra bits will be left dangling without any fan-out logic." {  } { { "edgewen.v" "lpm_multe" { Text "F:/sopc/lunwen/edge/edgewen.v" 112 0 0 } }  } 0 12030 "Port \"%1!s!\" on the entity instantiation of \"%2!s!\" is connected to a signal of width %3!d!. The formal width of the signal in the module is %4!d!.  The extra bits will be left dangling without any fan-out logic." 0 0 "" 0 0}
{ "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_TOP" "" "Warning: Net is missing source, defaulting to GND" { { "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_SUB" "edgewen:inst\|lv2\[22\] " "Warning (12110): Net \"edgewen:inst\|lv2\[22\]\" is missing source, defaulting to GND" {  } { { "edgewen.v" "lv2\[22\]" { Text "F:/sopc/lunwen/edge/edgewen.v" 32 -1 0 } }  } 0 12110 "Net \"%1!s!\" is missing source, defaulting to GND" 0 0 "" 0 0} { "Warning" "WSGN_TRI_BUS_MISSING_SOURCE_SUB" "edgewen:inst\|ly2\[22\] " "Warning (12110): Net \"edgewen:inst\|ly2\[22\]\" is missing source, defaulting to GND" {  } { { "edgewen.v" "ly2\[22\]" { Text "F:/sopc/lunwen/edge/edgewen.v" 32 -1 0 } }  } 0 12110 "Net \"%1!s!\" is missing source, defaulting to GND" 0 0 "" 0 0}  } {  } 0 0 "Net is missing source, defaulting to GND" 0 0 "" 0 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "437 " "Info: Implemented 437 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "25 " "Info: Implemented 25 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_OPINS" "77 " "Info: Implemented 77 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_LCELLS" "329 " "Info: Implemented 329 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_DSP_ELEM" "6 " "Info: Implemented 6 DSP elements" {  } {  } 0 0 "Implemented %1!d! DSP elements" 0 0 "" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 14 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 14 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "167 " "Info: Peak virtual memory: 167 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Tue Mar 03 13:26:27 2009 " "Info: Processing ended: Tue Mar 03 13:26:27 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:09 " "Info: Elapsed time: 00:00:09" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:05 " "Info: Total CPU time (on all processors): 00:00:05" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}