edge.hier_info

图像处理中边缘检测的VHDL源代码,所用的算法是garbor变换

clk => out_data2[10]~reg0.CLK
clk => out_data2[9]~reg0.CLK
clk => out_data2[8]~reg0.CLK
clk => out_data2[7]~reg0.CLK
clk => out_data2[6]~reg0.CLK
clk => out_data2[5]~reg0.CLK
clk => out_data2[4]~reg0.CLK
clk => out_data2[3]~reg0.CLK
clk => out_data2[2]~reg0.CLK
clk => out_data2[1]~reg0.CLK
clk => out_data2[0]~reg0.CLK
clk => out_data3[21]~reg0.CLK
clk => out_data3[20]~reg0.CLK
clk => out_data3[19]~reg0.CLK
clk => out_data3[18]~reg0.CLK
clk => out_data3[17]~reg0.CLK
clk => out_data3[16]~reg0.CLK
clk => out_data3[15]~reg0.CLK
clk => out_data3[14]~reg0.CLK
clk => out_data3[13]~reg0.CLK
clk => out_data3[12]~reg0.CLK
clk => out_data3[11]~reg0.CLK
clk => out_data3[10]~reg0.CLK
clk => out_data3[9]~reg0.CLK
clk => out_data3[8]~reg0.CLK
clk => out_data3[7]~reg0.CLK
clk => out_data3[6]~reg0.CLK
clk => out_data3[5]~reg0.CLK
clk => out_data3[4]~reg0.CLK
clk => out_data3[3]~reg0.CLK
clk => out_data3[2]~reg0.CLK
clk => out_data3[1]~reg0.CLK
clk => out_data3[0]~reg0.CLK
clk => out_data14[10]~reg0.CLK
clk => out_data14[9]~reg0.CLK
clk => out_data14[8]~reg0.CLK
clk => out_data14[7]~reg0.CLK
clk => out_data14[6]~reg0.CLK
clk => out_data14[5]~reg0.CLK
clk => out_data14[4]~reg0.CLK
clk => out_data14[3]~reg0.CLK
clk => out_data14[2]~reg0.CLK
clk => out_data14[1]~reg0.CLK
clk => out_data14[0]~reg0.CLK
clk => out_data15[10]~reg0.CLK
clk => out_data15[9]~reg0.CLK
clk => out_data15[8]~reg0.CLK
clk => out_data15[7]~reg0.CLK
clk => out_data15[6]~reg0.CLK
clk => out_data15[5]~reg0.CLK
clk => out_data15[4]~reg0.CLK
clk => out_data15[3]~reg0.CLK
clk => out_data15[2]~reg0.CLK
clk => out_data15[1]~reg0.CLK
clk => out_data15[0]~reg0.CLK


|edge|edgewen:inst|lpm_add_sub:lpm_add_sub1
dataa[0] => add_sub_1te:auto_generated.dataa[0]
dataa[1] => add_sub_1te:auto_generated.dataa[1]
dataa[2] => add_sub_1te:auto_generated.dataa[2]
dataa[3] => add_sub_1te:auto_generated.dataa[3]
dataa[4] => add_sub_1te:auto_generated.dataa[4]
dataa[5] => add_sub_1te:auto_generated.dataa[5]
dataa[6] => add_sub_1te:auto_generated.dataa[6]
dataa[7] => add_sub_1te:auto_generated.dataa[7]
dataa[8] => add_sub_1te:auto_generated.dataa[8]
dataa[9] => add_sub_1te:auto_generated.dataa[9]
dataa[10] => add_sub_1te:auto_generated.dataa[10]
datab[0] => add_sub_1te:auto_generated.datab[0]
datab[1] => add_sub_1te:auto_generated.datab[1]
datab[2] => add_sub_1te:auto_generated.datab[2]
datab[3] => add_sub_1te:auto_generated.datab[3]
datab[4] => add_sub_1te:auto_generated.datab[4]
datab[5] => add_sub_1te:auto_generated.datab[5]
datab[6] => add_sub_1te:auto_generated.datab[6]
datab[7] => add_sub_1te:auto_generated.datab[7]
datab[8] => add_sub_1te:auto_generated.datab[8]
datab[9] => add_sub_1te:auto_generated.datab[9]
datab[10] => add_sub_1te:auto_generated.datab[10]
cin => ~NO_FANOUT~
add_sub => ~NO_FANOUT~
clock => ~NO_FANOUT~
aclr => ~NO_FANOUT~
clken => ~NO_FANOUT~
result[0] <= add_sub_1te:auto_generated.result[0]
result[1] <= add_sub_1te:auto_generated.result[1]
result[2] <= add_sub_1te:auto_generated.result[2]
result[3] <= add_sub_1te:auto_generated.result[3]
result[4] <= add_sub_1te:auto_generated.result[4]
result[5] <= add_sub_1te:auto_generated.result[5]
result[6] <= add_sub_1te:auto_generated.result[6]
result[7] <= add_sub_1te:auto_generated.result[7]
result[8] <= add_sub_1te:auto_generated.result[8]
result[9] <= add_sub_1te:auto_generated.result[9]
result[10] <= add_sub_1te:auto_generated.result[10]
cout <= <GND>
overflow <= <GND>


|edge|edgewen:inst|lpm_add_sub:lpm_add_sub1|add_sub_1te:auto_generated
dataa[0] => op_1.IN21
dataa[1] => op_1.IN19
dataa[2] => op_1.IN17
dataa[3] => op_1.IN15
dataa[4] => op_1.IN13
dataa[5] => op_1.IN11
dataa[6] => op_1.IN9
dataa[7] => op_1.IN7
dataa[8] => op_1.IN5
dataa[9] => op_1.IN3
dataa[10] => op_1.IN1
datab[0] => op_1.IN22
datab[1] => op_1.IN20
datab[2] => op_1.IN18
datab[3] => op_1.IN16
datab[4] => op_1.IN14
datab[5] => op_1.IN12
datab[6] => op_1.IN10
datab[7] => op_1.IN8
datab[8] => op_1.IN6
datab[9] => op_1.IN4
datab[10] => op_1.IN2
result[0] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[1] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[2] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[3] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[4] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[5] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[6] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[7] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[8] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[9] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[10] <= op_1.DB_MAX_OUTPUT_PORT_TYPE


|edge|edgewen:inst|lpm_add_sub:lpm_add_sub2
dataa[0] => add_sub_1te:auto_generated.dataa[0]
dataa[1] => add_sub_1te:auto_generated.dataa[1]
dataa[2] => add_sub_1te:auto_generated.dataa[2]
dataa[3] => add_sub_1te:auto_generated.dataa[3]
dataa[4] => add_sub_1te:auto_generated.dataa[4]
dataa[5] => add_sub_1te:auto_generated.dataa[5]
dataa[6] => add_sub_1te:auto_generated.dataa[6]
dataa[7] => add_sub_1te:auto_generated.dataa[7]
dataa[8] => add_sub_1te:auto_generated.dataa[8]
dataa[9] => add_sub_1te:auto_generated.dataa[9]
dataa[10] => add_sub_1te:auto_generated.dataa[10]
datab[0] => add_sub_1te:auto_generated.datab[0]
datab[1] => add_sub_1te:auto_generated.datab[1]
datab[2] => add_sub_1te:auto_generated.datab[2]
datab[3] => add_sub_1te:auto_generated.datab[3]
datab[4] => add_sub_1te:auto_generated.datab[4]
datab[5] => add_sub_1te:auto_generated.datab[5]
datab[6] => add_sub_1te:auto_generated.datab[6]
datab[7] => add_sub_1te:auto_generated.datab[7]
datab[8] => add_sub_1te:auto_generated.datab[8]
datab[9] => add_sub_1te:auto_generated.datab[9]
datab[10] => add_sub_1te:auto_generated.datab[10]
cin => ~NO_FANOUT~
add_sub => ~NO_FANOUT~
clock => ~NO_FANOUT~
aclr => ~NO_FANOUT~
clken => ~NO_FANOUT~
result[0] <= add_sub_1te:auto_generated.result[0]
result[1] <= add_sub_1te:auto_generated.result[1]
result[2] <= add_sub_1te:auto_generated.result[2]
result[3] <= add_sub_1te:auto_generated.result[3]
result[4] <= add_sub_1te:auto_generated.result[4]
result[5] <= add_sub_1te:auto_generated.result[5]
result[6] <= add_sub_1te:auto_generated.result[6]
result[7] <= add_sub_1te:auto_generated.result[7]
result[8] <= add_sub_1te:auto_generated.result[8]
result[9] <= add_sub_1te:auto_generated.result[9]
result[10] <= add_sub_1te:auto_generated.result[10]
cout <= <GND>
overflow <= <GND>


|edge|edgewen:inst|lpm_add_sub:lpm_add_sub2|add_sub_1te:auto_generated
dataa[0] => op_1.IN21
dataa[1] => op_1.IN19
dataa[2] => op_1.IN17
dataa[3] => op_1.IN15
dataa[4] => op_1.IN13
dataa[5] => op_1.IN11
dataa[6] => op_1.IN9
dataa[7] => op_1.IN7
dataa[8] => op_1.IN5
dataa[9] => op_1.IN3
dataa[10] => op_1.IN1
datab[0] => op_1.IN22
datab[1] => op_1.IN20
datab[2] => op_1.IN18
datab[3] => op_1.IN16
datab[4] => op_1.IN14
datab[5] => op_1.IN12
datab[6] => op_1.IN10
datab[7] => op_1.IN8
datab[8] => op_1.IN6
datab[9] => op_1.IN4
datab[10] => op_1.IN2
result[0] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[1] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[2] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[3] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[4] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[5] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[6] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[7] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[8] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[9] <= op_1.DB_MAX_OUTPUT_PORT_TYPE
result[10] <= op_1.DB_MAX_OUTPUT_PORT_TYPE


|edge|edgewen:inst|lpm_abs1:tem1
result[0] <= result~10.DB_MAX_OUTPUT_PORT_TYPE
result[1] <= result~9.DB_MAX_OUTPUT_PORT_TYPE
result[2] <= result~8.DB_MAX_OUTPUT_PORT_TYPE
result[3] <= result~7.DB_MAX_OUTPUT_PORT_TYPE
result[4] <= result~6.DB_MAX_OUTPUT_PORT_TYPE
result[5] <= result~5.DB_MAX_OUTPUT_PORT_TYPE
result[6] <= result~4.DB_MAX_OUTPUT_PORT_TYPE
result[7] <= result~3.DB_MAX_OUTPUT_PORT_TYPE
result[8] <= result~2.DB_MAX_OUTPUT_PORT_TYPE
result[9] <= result~1.DB_MAX_OUTPUT_PORT_TYPE
result[10] <= result~0.DB_MAX_OUTPUT_PORT_TYPE
overflow <= overflow~0.DB_MAX_OUTPUT_PORT_TYPE
data[0] => result~10.DATAA
data[0] => Add0.IN11
data[1] => result~9.DATAA
data[1] => Add0.IN12
data[2] => result~8.DATAA
data[2] => Add0.IN13
data[3] => result~7.DATAA
data[3] => Add0.IN14
data[4] => result~6.DATAA
data[4] => Add0.IN15
data[5] => result~5.DATAA
data[5] => Add0.IN16
data[6] => result~4.DATAA
data[6] => Add0.IN17
data[7] => result~3.DATAA
data[7] => Add0.IN18
data[8] => result~2.DATAA
data[8] => Add0.IN19
data[9] => result~1.DATAA
data[9] => Add0.IN20
data[10] => overflow~0.OUTPUTSELECT
data[10] => result~10.OUTPUTSELECT
data[10] => result~9.OUTPUTSELECT
data[10] => result~8.OUTPUTSELECT
data[10] => result~7.OUTPUTSELECT
data[10] => result~6.OUTPUTSELECT
data[10] => result~5.OUTPUTSELECT
data[10] => result~4.OUTPUTSELECT
data[10] => result~3.OUTPUTSELECT
data[10] => result~2.OUTPUTSELECT
data[10] => result~1.OUTPUTSELECT
data[10] => result~0.OUTPUTSELECT


|edge|edgewen:inst|lpm_abs1:tem2
result[0] <= result~10.DB_MAX_OUTPUT_PORT_TYPE
result[1] <= result~9.DB_MAX_OUTPUT_PORT_TYPE
result[2] <= result~8.DB_MAX_OUTPUT_PORT_TYPE
result[3] <= result~7.DB_MAX_OUTPUT_PORT_TYPE
result[4] <= result~6.DB_MAX_OUTPUT_PORT_TYPE
result[5] <= result~5.DB_MAX_OUTPUT_PORT_TYPE
result[6] <= result~4.DB_MAX_OUTPUT_PORT_TYPE
result[7] <= result~3.DB_MAX_OUTPUT_PORT_TYPE
result[8] <= result~2.DB_MAX_OUTPUT_PORT_TYPE
result[9] <= result~1.DB_MAX_OUTPUT_PORT_TYPE
result[10] <= result~0.DB_MAX_OUTPUT_PORT_TYPE
overflow <= overflow~0.DB_MAX_OUTPUT_PORT_TYPE
data[0] => result~10.DATAA
data[0] => Add0.IN11
data[1] => result~9.DATAA
data[1] => Add0.IN12
data[2] => result~8.DATAA
data[2] => Add0.IN13
data[3] => result~7.DATAA
data[3] => Add0.IN14
data[4] => result~6.DATAA
data[4] => Add0.IN15
data[5] => result~5.DATAA
data[5] => Add0.IN16
data[6] => result~4.DATAA
data[6] => Add0.IN17
data[7] => result~3.DATAA
data[7] => Add0.IN18
data[8] => result~2.DATAA
data[8] => Add0.IN19
data[9] => result~1.DATAA
data[9] => Add0.IN20
data[10] => overflow~0.OUTPUTSELECT
data[10] => result~10.OUTPUTSELECT
data[10] => result~9.OUTPUTSELECT
data[10] => result~8.OUTPUTSELECT
data[10] => result~7.OUTPUTSELECT
data[10] => result~6.OUTPUTSELECT
data[10] => result~5.OUTPUTSELECT
data[10] => result~4.OUTPUTSELECT
data[10] => result~3.OUTPUTSELECT
data[10] => result~2.OUTPUTSELECT
data[10] => result~1.OUTPUTSELECT
data[10] => result~0.OUTPUTSELECT


|edge|edgewen:inst|lpm_mult:lpm_multe
dataa[0] => mult_o3n:auto_generated.dataa[0]
dataa[1] => mult_o3n:auto_generated.dataa[1]
dataa[2] => mult_o3n:auto_generated.dataa[2]
dataa[3] => mult_o3n:auto_generated.dataa[3]
dataa[4] => mult_o3n:auto_generated.dataa[4]
dataa[5] => mult_o3n:auto_generated.dataa[5]
dataa[6] => mult_o3n:auto_generated.dataa[6]
dataa[7] => mult_o3n:auto_generated.dataa[7]
dataa[8] => mult_o3n:auto_generated.dataa[8]
dataa[9] => mult_o3n:auto_generated.dataa[9]
dataa[10] => mult_o3n:auto_generated.dataa[10]
datab[0] => mult_o3n:auto_generated.datab[0]
datab[1] => mult_o3n:auto_generated.datab[1]
datab[2] => mult_o3n:auto_generated.datab[2]
datab[3] => mult_o3n:auto_generated.datab[3]
datab[4] => mult_o3n:auto_generated.datab[4]
datab[5] => mult_o3n:auto_generated.datab[5]
datab[6] => mult_o3n:auto_generated.datab[6]
datab[7] => mult_o3n:auto_generated.datab[7]
datab[8] => mult_o3n:auto_generated.datab[8]
datab[9] => mult_o3n:auto_generated.datab[9]
datab[10] => mult_o3n:auto_generated.datab[10]
sum[0] => ~NO_FANOUT~
aclr => ~NO_FANOUT~
clock => ~NO_FANOUT~
clken => ~NO_FANOUT~
result[0] <= mult_o3n:auto_generated.result[0]
result[1] <= mult_o3n:auto_generated.result[1]
result[2] <= mult_o3n:auto_generated.result[2]
result[3] <= mult_o3n:auto_generated.result[3]
result[4] <= mult_o3n:auto_generated.result[4]
result[5] <= mult_o3n:auto_generated.result[5]
result[6] <= mult_o3n:auto_generated.result[6]
result[7] <= mult_o3n:auto_generated.result[7]
result[8] <= mult_o3n:auto_generated.result[8]
result[9] <= mult_o3n:auto_generated.result[9]
result[10] <= mult_o3n:auto_generated.result[10]
result[11] <= mult_o3n:auto_generated.result[11]
result[12] <= mult_o3n:auto_generated.result[12]
result[13] <= mult_o3n:auto_generated.result[13]
result[14] <= mult_o3n:auto_generated.result[14]
result[15] <= mult_o3n:auto_generated.result[15]
result[16] <= mult_o3n:auto_generated.result[16]
result[17] <= mult_o3n:auto_generated.result[17]
result[18] <= mult_o3n:auto_generated.result[18]
result[19] <= mult_o3n:auto_generated.result[19]
result[20] <= mult_o3n:auto_generated.result[20]
result[21] <= mult_o3n:auto_generated.result[21]


|edge|edgewen:inst|lpm_mult:lpm_multe|mult_o3n:auto_generated
dataa[0] => cycloneii_mac_mult:mac_mult1.DATAA[0]
dataa[1] => cycloneii_mac_mult:mac_mult1.DATAA[1]
dataa[2] => cycloneii_mac_mult:mac_mult1.DATAA[2]
dataa[3] => cycloneii_mac_mult:mac_mult1.DATAA[3]
dataa[4] => cycloneii_mac_mult:mac_mult1.DATAA[4]
dataa[5] => cycloneii_mac_mult:mac_mult1.DATAA[5]
dataa[6] => cycloneii_mac_mult:mac_mult1.DATAA[6]
dataa[7] => cycloneii_mac_mult:mac_mult1.DATAA[7]
dataa[8] => cycloneii_mac_mult:mac_mult1.DATAA[8]
dataa[9] => cycloneii_mac_mult:mac_mult1.DATAA[9]
dataa[10] => cycloneii_mac_mult:mac_mult1.DATAA[10]
datab[0] => cycloneii_mac_mult:mac_mult1.DATAB[0]
datab[1] => cycloneii_mac_mult:mac_mult1.DATAB[1]
datab[2] => cycloneii_mac_mult:mac_mult1.DATAB[2]
datab[3] => cycloneii_mac_mult:mac_mult1.DATAB[3]
datab[4] => cycloneii_mac_mult:mac_mult1.DATAB[4]
datab[5] => cycloneii_mac_mult:mac_mult1.DATAB[5]
datab[6] => cycloneii_mac_mult:mac_mult1.DATAB[6]
datab[7] => cycloneii_mac_mult:mac_mult1.DATAB[7]
datab[8] => cycloneii_mac_mult:mac_mult1.DATAB[8]
datab[9] => cycloneii_mac_mult:mac_mult1.DATAB[9]
datab[10] => cycloneii_mac_mult:mac_mult1.DATAB[10]
result[0] <= cycloneii_mac_out:mac_out2.DATAOUT[0]
result[1] <= cycloneii_mac_out:mac_out2.DATAOUT[1]