edge.map.rpt

来自「图像处理中边缘检测的VHDL源代码,所用的算法是garbor变换」· RPT 代码 · 共 612 行 · 第 1/4 页

+------------------------+-------------+---------------------------------------------+
; LPM_WIDTH              ; 22          ; Signed Integer                              ;
; LPM_REPRESENTATION     ; SIGNED      ; Untyped                                     ;
; LPM_DIRECTION          ; SUB         ; Untyped                                     ;
; ONE_INPUT_IS_CONSTANT  ; NO          ; Untyped                                     ;
; LPM_PIPELINE           ; 0           ; Untyped                                     ;
; MAXIMIZE_SPEED         ; 5           ; Untyped                                     ;
; REGISTERED_AT_END      ; 0           ; Untyped                                     ;
; OPTIMIZE_FOR_SPEED     ; 5           ; Untyped                                     ;
; USE_CS_BUFFERS         ; 1           ; Untyped                                     ;
; CARRY_CHAIN            ; MANUAL      ; Untyped                                     ;
; CARRY_CHAIN_LENGTH     ; 48          ; CARRY_CHAIN_LENGTH                          ;
; DEVICE_FAMILY          ; Cyclone II  ; Untyped                                     ;
; USE_WYS                ; OFF         ; Untyped                                     ;
; STYLE                  ; FAST        ; Untyped                                     ;
; CBXI_PARAMETER         ; add_sub_3te ; Untyped                                     ;
; AUTO_CARRY_CHAINS      ; ON          ; AUTO_CARRY                                  ;
; IGNORE_CARRY_BUFFERS   ; OFF         ; IGNORE_CARRY                                ;
; AUTO_CASCADE_CHAINS    ; ON          ; AUTO_CASCADE                                ;
; IGNORE_CASCADE_BUFFERS ; OFF         ; IGNORE_CASCADE                              ;
+------------------------+-------------+---------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------+
; lpm_mult Parameter Settings by Entity Instance                           ;
+---------------------------------------+----------------------------------+
; Name                                  ; Value                            ;
+---------------------------------------+----------------------------------+
; Number of entity instances            ; 3                                ;
; Entity Instance                       ; edgewen:inst|lpm_mult:lpm_multe  ;
;     -- LPM_WIDTHA                     ; 11                               ;
;     -- LPM_WIDTHB                     ; 11                               ;
;     -- LPM_WIDTHP                     ; 22                               ;
;     -- LPM_REPRESENTATION             ; SIGNED                           ;
;     -- INPUT_A_IS_CONSTANT            ; NO                               ;
;     -- INPUT_B_IS_CONSTANT            ; NO                               ;
;     -- USE_EAB                        ; OFF                              ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                             ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                               ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                               ;
; Entity Instance                       ; edgewen:inst|lpm_mult:lpm_multe1 ;
;     -- LPM_WIDTHA                     ; 11                               ;
;     -- LPM_WIDTHB                     ; 11                               ;
;     -- LPM_WIDTHP                     ; 22                               ;
;     -- LPM_REPRESENTATION             ; SIGNED                           ;
;     -- INPUT_A_IS_CONSTANT            ; NO                               ;
;     -- INPUT_B_IS_CONSTANT            ; NO                               ;
;     -- USE_EAB                        ; OFF                              ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                             ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                               ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                               ;
; Entity Instance                       ; edgewen:inst|lpm_mult:lpm_multe2 ;
;     -- LPM_WIDTHA                     ; 11                               ;
;     -- LPM_WIDTHB                     ; 11                               ;
;     -- LPM_WIDTHP                     ; 22                               ;
;     -- LPM_REPRESENTATION             ; SIGNED                           ;
;     -- INPUT_A_IS_CONSTANT            ; NO                               ;
;     -- INPUT_B_IS_CONSTANT            ; NO                               ;
;     -- USE_EAB                        ; OFF                              ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                             ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                               ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                               ;
+---------------------------------------+----------------------------------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 8.1 Build 163 10/28/2008 SJ Web Edition
    Info: Processing started: Tue Mar 03 13:26:18 2009
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off edge -c edge
Info: Found 1 design units, including 1 entities, in source file edgewen.v
    Info: Found entity 1: edgewen
Info: Found 1 design units, including 1 entities, in source file lpm_abs1.v
    Info: Found entity 1: lpm_abs1
Info: Found 1 design units, including 1 entities, in source file edge.bdf
    Info: Found entity 1: edge
Info: Found 1 design units, including 1 entities, in source file cordic.v
    Info: Found entity 1: cordic
Info: Elaborating entity "edge" for the top level hierarchy
Warning: Block or symbol "edgewen" of instance "inst" overlaps another block or symbol
Info: Elaborating entity "edgewen" for hierarchy "edgewen:inst"
Warning (10230): Verilog HDL assignment warning at edgewen.v(143): truncated value with size 23 to match size of target (22)
Info: Elaborating entity "lpm_add_sub" for hierarchy "edgewen:inst|lpm_add_sub:lpm_add_sub1"
Info: Elaborated megafunction instantiation "edgewen:inst|lpm_add_sub:lpm_add_sub1"
Info: Instantiated megafunction "edgewen:inst|lpm_add_sub:lpm_add_sub1" with the following parameter:
    Info: Parameter "lpm_width" = "11"
    Info: Parameter "lpm_representation" = "SIGNED"
    Info: Parameter "lpm_direction" = "SUB"
Info: Found 1 design units, including 1 entities, in source file db/add_sub_1te.tdf
    Info: Found entity 1: add_sub_1te
Info: Elaborating entity "add_sub_1te" for hierarchy "edgewen:inst|lpm_add_sub:lpm_add_sub1|add_sub_1te:auto_generated"
Info: Elaborating entity "lpm_abs1" for hierarchy "edgewen:inst|lpm_abs1:tem1"
Warning (10230): Verilog HDL assignment warning at lpm_abs1.v(24): truncated value with size 32 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at lpm_abs1.v(25): truncated value with size 32 to match size of target (11)
Warning (10240): Verilog HDL Always Construct warning at lpm_abs1.v(16): inferring latch(es) for variable "a_int", which holds its previous value in one or more paths through the always construct
Warning (10240): Verilog HDL Always Construct warning at lpm_abs1.v(16): inferring latch(es) for variable "i", which holds its previous value in one or more paths through the always construct
Info: Elaborating entity "lpm_mult" for hierarchy "edgewen:inst|lpm_mult:lpm_multe"
Info: Elaborated megafunction instantiation "edgewen:inst|lpm_mult:lpm_multe"
Info: Instantiated megafunction "edgewen:inst|lpm_mult:lpm_multe" with the following parameter:
    Info: Parameter "lpm_hint" = "MAXIMIZE_SPEED=5"
    Info: Parameter "lpm_representation" = "SIGNED"
    Info: Parameter "lpm_type" = "LPM_MULT"
    Info: Parameter "lpm_widtha" = "11"
    Info: Parameter "lpm_widthb" = "11"
    Info: Parameter "lpm_widthp" = "22"
Info: Found 1 design units, including 1 entities, in source file db/mult_o3n.tdf
    Info: Found entity 1: mult_o3n
Info: Elaborating entity "mult_o3n" for hierarchy "edgewen:inst|lpm_mult:lpm_multe|mult_o3n:auto_generated"
Info: Elaborating entity "lpm_mult" for hierarchy "edgewen:inst|lpm_mult:lpm_multe1"
Info: Elaborated megafunction instantiation "edgewen:inst|lpm_mult:lpm_multe1"
Info: Instantiated megafunction "edgewen:inst|lpm_mult:lpm_multe1" with the following parameter:
    Info: Parameter "lpm_widtha" = "11"
    Info: Parameter "lpm_widthb" = "11"
    Info: Parameter "lpm_widths" = "11"
    Info: Parameter "lpm_widthp" = "22"
    Info: Parameter "lpm_representation" = "SIGNED"
Info: Found 1 design units, including 1 entities, in source file db/mult_com.tdf
    Info: Found entity 1: mult_com
Info: Elaborating entity "mult_com" for hierarchy "edgewen:inst|lpm_mult:lpm_multe1|mult_com:auto_generated"
Info: Elaborating entity "lpm_add_sub" for hierarchy "edgewen:inst|lpm_add_sub:lpm_add_sub3"
Info: Elaborated megafunction instantiation "edgewen:inst|lpm_add_sub:lpm_add_sub3"
Info: Instantiated megafunction "edgewen:inst|lpm_add_sub:lpm_add_sub3" with the following parameter:
    Info: Parameter "lpm_width" = "22"
    Info: Parameter "lpm_representation" = "SIGNED"
    Info: Parameter "lpm_direction" = "SUB"
Info: Found 1 design units, including 1 entities, in source file db/add_sub_3te.tdf
    Info: Found entity 1: add_sub_3te
Info: Elaborating entity "add_sub_3te" for hierarchy "edgewen:inst|lpm_add_sub:lpm_add_sub3|add_sub_3te:auto_generated"
Warning (12020): Port "dataa" on the entity instantiation of "lpm_add_sub3" is connected to a signal of width 23. The formal width of the signal in the module is 22.  The extra bits will be ignored.
Warning (12020): Port "datab" on the entity instantiation of "lpm_add_sub3" is connected to a signal of width 23. The formal width of the signal in the module is 22.  The extra bits will be ignored.
Warning (12030): Port "result" on the entity instantiation of "lpm_multe2" is connected to a signal of width 23. The formal width of the signal in the module is 22.  The extra bits will be left dangling without any fan-out logic.
Warning (12030): Port "result" on the entity instantiation of "lpm_multe1" is connected to a signal of width 23. The formal width of the signal in the module is 22.  The extra bits will be left dangling without any fan-out logic.
Warning (12030): Port "result" on the entity instantiation of "lpm_multe" is connected to a signal of width 23. The formal width of the signal in the module is 22.  The extra bits will be left dangling without any fan-out logic.
Warning: Net is missing source, defaulting to GND
    Warning (12110): Net "edgewen:inst|lv2[22]" is missing source, defaulting to GND
    Warning (12110): Net "edgewen:inst|ly2[22]" is missing source, defaulting to GND
Info: Implemented 437 device resources after synthesis - the final resource count might be different
    Info: Implemented 25 input pins
    Info: Implemented 77 output pins
    Info: Implemented 329 logic cells
    Info: Implemented 6 DSP elements
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 14 warnings
    Info: Peak virtual memory: 167 megabytes
    Info: Processing ended: Tue Mar 03 13:26:27 2009
    Info: Elapsed time: 00:00:09
    Info: Total CPU time (on all processors): 00:00:05