filter.hif

图像处理技术中3*3模板的滤波电路的VHDL实现.

Version 8.1 Build 163 10/28/2008 SJ Web Edition
11
1009
OFF
OFF
OFF
OFF
ON
ON
ON
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
filter
# storage
db|filter.(0).cnf
db|filter.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
filter.v
b7c2f68e39e333c7e334bf236b9c76f
8
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
VERILOG_CONSTANT_LOOP_LIMIT
5000
VERILOG_NON_CONSTANT_LOOP_LIMIT
250
}
# hierarchies {
|
}
# macro_sequence

# end
# entity
reg8
# storage
db|filter.(1).cnf
db|filter.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
reg8.v
6b2d8704c3fb21cba61fc96b87fd5f
8
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
VERILOG_CONSTANT_LOOP_LIMIT
5000
VERILOG_NON_CONSTANT_LOOP_LIMIT
250
}
# hierarchies {
reg8:reg8_11
reg8:reg8_12
reg8:reg8_13
reg8:reg8_21
reg8:reg8_22
reg8:reg8_23
}
# macro_sequence

# end
# entity
count3
# storage
db|filter.(2).cnf
db|filter.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
count3.v
b419a3d43249b6262b901b409bc087
8
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
VERILOG_CONSTANT_LOOP_LIMIT
5000
VERILOG_NON_CONSTANT_LOOP_LIMIT
250
}
# hierarchies {
count3:count31
}
# macro_sequence

# end
# entity
add8_9
# storage
db|filter.(3).cnf
db|filter.(3).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
add8_9.v
da5457bbdf5248eda718965a2bd9a8d
8
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
VERILOG_CONSTANT_LOOP_LIMIT
5000
VERILOG_NON_CONSTANT_LOOP_LIMIT
250
}
# user_parameter {
WIDTH
8
PARAMETER_SIGNED_DEC
DEF
WIDTH1
8
PARAMETER_SIGNED_DEC
DEF
}
# hierarchies {
add8_9:add8_91
add8_9:add8_92
}
# macro_sequence

# end
# entity
lpm_add_sub
# storage
db|filter.(4).cnf
db|filter.(4).cnf
# case_insensitive
# source_file
c:|altera|81|quartus|libraries|megafunctions|lpm_add_sub.tdf
1c1195a367bf9152c0cd4ed197d726c2
7
# user_parameter {
LPM_WIDTH
8
PARAMETER_SIGNED_DEC
USR
LPM_REPRESENTATION
SIGNED
PARAMETER_UNKNOWN
DEF
LPM_DIRECTION
add
PARAMETER_UNKNOWN
USR
ONE_INPUT_IS_CONSTANT
NO
PARAMETER_UNKNOWN
DEF
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
REGISTERED_AT_END
0
PARAMETER_UNKNOWN
DEF
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
USE_WYS
OFF
PARAMETER_UNKNOWN
DEF
STYLE
FAST
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
add_sub_rjc
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
result
-1
3
datab
-1
3
dataa
-1
3
cout
-1
3
}
# include_file {
c:|altera|81|quartus|libraries|megafunctions|addcore.inc
ff795e21e4847824c03218724f1a1252
c:|altera|81|quartus|libraries|megafunctions|look_add.inc
ab9f577d30c5ef3166fab6c1c32c4a
c:|altera|81|quartus|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
c:|altera|81|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
c:|altera|81|quartus|libraries|megafunctions|aglobal81.inc
ba79644cade9dcbd5df4af72a9b02986
c:|altera|81|quartus|libraries|megafunctions|alt_mercury_add_sub.inc
ae39f15ed67cc9a095d29f68f6ad0f8
c:|altera|81|quartus|libraries|megafunctions|alt_stratix_add_sub.inc
c08f604aefba5b4f1f554e565113c6
}
# hierarchies {
add8_9:add8_91|lpm_add_sub:add_1
add8_9:add8_92|lpm_add_sub:add_1
}
# macro_sequence

# end
# entity
add_sub_rjc
# storage
db|filter.(5).cnf
db|filter.(5).cnf
# case_insensitive
# source_file
db|add_sub_rjc.tdf
ee41644641a3c91e7fa75cc54411771b
7
# used_port {
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result1
-1
3
result0
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab1
-1
3
datab0
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa1
-1
3
dataa0
-1
3
cout
-1
3
}
# hierarchies {
add8_9:add8_91|lpm_add_sub:add_1|add_sub_rjc:auto_generated
add8_9:add8_92|lpm_add_sub:add_1|add_sub_rjc:auto_generated
}
# macro_sequence

# end
# entity
add_1p
# storage
db|filter.(6).cnf
db|filter.(6).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
add_1p .v
14339aff8aae7f16e22e95f9c058907d
8
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
VERILOG_CONSTANT_LOOP_LIMIT
5000
VERILOG_NON_CONSTANT_LOOP_LIMIT
250
}
# user_parameter {
WIDTH
9
PARAMETER_SIGNED_DEC
USR
WIDTH1
7
PARAMETER_SIGNED_DEC
USR
WIDTH2
2
PARAMETER_SIGNED_DEC
USR
}
# hierarchies {
add_1p:add9
}
# macro_sequence

# end
# entity
lpm_add_sub
# storage
db|filter.(7).cnf
db|filter.(7).cnf
# case_insensitive
# source_file
c:|altera|81|quartus|libraries|megafunctions|lpm_add_sub.tdf
1c1195a367bf9152c0cd4ed197d726c2
7
# user_parameter {
LPM_WIDTH
7
PARAMETER_SIGNED_DEC
USR
LPM_REPRESENTATION
SIGNED
PARAMETER_UNKNOWN
DEF
LPM_DIRECTION
add
PARAMETER_UNKNOWN
USR
ONE_INPUT_IS_CONSTANT
NO
PARAMETER_UNKNOWN
DEF
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
REGISTERED_AT_END
0
PARAMETER_UNKNOWN
DEF
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
USE_WYS
OFF
PARAMETER_UNKNOWN
DEF
STYLE
FAST
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
add_sub_qjc
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
result
-1
3
datab
-1
3
dataa
-1
3
cout
-1
3
}
# include_file {
c:|altera|81|quartus|libraries|megafunctions|addcore.inc
ff795e21e4847824c03218724f1a1252
c:|altera|81|quartus|libraries|megafunctions|look_add.inc
ab9f577d30c5ef3166fab6c1c32c4a
c:|altera|81|quartus|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
c:|altera|81|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
c:|altera|81|quartus|libraries|megafunctions|aglobal81.inc
ba79644cade9dcbd5df4af72a9b02986
c:|altera|81|quartus|libraries|megafunctions|alt_mercury_add_sub.inc
ae39f15ed67cc9a095d29f68f6ad0f8
c:|altera|81|quartus|libraries|megafunctions|alt_stratix_add_sub.inc
c08f604aefba5b4f1f554e565113c6
}
# hierarchies {
add_1p:add9|lpm_add_sub:add_1
}
# macro_sequence

# end
# entity
add_sub_qjc
# storage
db|filter.(8).cnf
db|filter.(8).cnf
# case_insensitive
# source_file
db|add_sub_qjc.tdf
9fc8243eefb3851367f0a6dbf92b5ad9
7
# used_port {
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result1
-1
3
result0
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab1
-1
3
datab0
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa1
-1
3
dataa0
-1
3
cout
-1
3
}
# hierarchies {
add_1p:add9|lpm_add_sub:add_1|add_sub_qjc:auto_generated
}
# macro_sequence

# end
# entity
lpm_ff
# storage
db|filter.(9).cnf
db|filter.(9).cnf
# case_insensitive
# source_file
c:|altera|81|quartus|libraries|megafunctions|lpm_ff.tdf
3549d21918f4693a6fc64e871d3e4f7a
7
# user_parameter {
LPM_WIDTH
7
PARAMETER_SIGNED_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_FFTYPE
DFF
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
NOTHING
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
q
-1
3
data
-1
3
clock
-1
3
}
# include_file {
c:|altera|81|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
c:|altera|81|quartus|libraries|megafunctions|aglobal81.inc
ba79644cade9dcbd5df4af72a9b02986
}
# hierarchies {
add_1p:add9|lpm_ff:reg_1
}
# macro_sequence

# end
# entity
lpm_ff
# storage
db|filter.(10).cnf
db|filter.(10).cnf
# case_insensitive
# source_file