📄 ram_v.sdo

📁 用VerilogHDL写的ram程序
💻 SDO
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    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1295:1295:1295) (1295:1295:1295))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE temp_data\[9\].lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (4281:4281:4281) (4281:4281:4281))
        (PORT datad (4931:4931:4931) (4931:4931:4931))
        (IOPATH datad combout (87:87:87) (87:87:87))
        (IOPATH qfbkin combout (291:291:291) (291:291:291))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE temp_data\[9\].lereg)
    (DELAY
      (ABSOLUTE
        (PORT datac (4371:4371:4371) (4371:4371:4371))
        (PORT aclr (668:668:668) (668:668:668))
        (PORT clk (2334:2334:2334) (2334:2334:2334))
        (IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
        (IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
      )
    )
    (TIMINGCHECK
      (SETUP datac (posedge clk) (10:10:10))
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datac (posedge clk) (100:100:100))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE data\[10\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1295:1295:1295) (1295:1295:1295))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE temp_data\[10\].lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (4072:4072:4072) (4072:4072:4072))
        (PORT datad (4614:4614:4614) (4614:4614:4614))
        (IOPATH datad combout (87:87:87) (87:87:87))
        (IOPATH qfbkin combout (291:291:291) (291:291:291))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE temp_data\[10\].lereg)
    (DELAY
      (ABSOLUTE
        (PORT datac (4162:4162:4162) (4162:4162:4162))
        (PORT aclr (668:668:668) (668:668:668))
        (PORT clk (2339:2339:2339) (2339:2339:2339))
        (IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
        (IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
      )
    )
    (TIMINGCHECK
      (SETUP datac (posedge clk) (10:10:10))
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datac (posedge clk) (100:100:100))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE data\[11\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1295:1295:1295) (1295:1295:1295))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE temp_data\[11\].lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (4057:4057:4057) (4057:4057:4057))
        (PORT datad (4623:4623:4623) (4623:4623:4623))
        (IOPATH datad combout (87:87:87) (87:87:87))
        (IOPATH qfbkin combout (291:291:291) (291:291:291))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE temp_data\[11\].lereg)
    (DELAY
      (ABSOLUTE
        (PORT datac (4147:4147:4147) (4147:4147:4147))
        (PORT aclr (668:668:668) (668:668:668))
        (PORT clk (2339:2339:2339) (2339:2339:2339))
        (IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
        (IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
      )
    )
    (TIMINGCHECK
      (SETUP datac (posedge clk) (10:10:10))
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datac (posedge clk) (100:100:100))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE data\[12\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1295:1295:1295) (1295:1295:1295))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE temp_data\[12\].lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (4091:4091:4091) (4091:4091:4091))
        (PORT datad (4622:4622:4622) (4622:4622:4622))
        (IOPATH datad combout (87:87:87) (87:87:87))
        (IOPATH qfbkin combout (291:291:291) (291:291:291))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE temp_data\[12\].lereg)
    (DELAY
      (ABSOLUTE
        (PORT datac (4181:4181:4181) (4181:4181:4181))
        (PORT aclr (668:668:668) (668:668:668))
        (PORT clk (2339:2339:2339) (2339:2339:2339))
        (IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
        (IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
      )
    )
    (TIMINGCHECK
      (SETUP datac (posedge clk) (10:10:10))
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datac (posedge clk) (100:100:100))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE data\[13\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1295:1295:1295) (1295:1295:1295))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE temp_data\[13\].lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (3865:3865:3865) (3865:3865:3865))
        (PORT datad (4607:4607:4607) (4607:4607:4607))
        (IOPATH datad combout (87:87:87) (87:87:87))
        (IOPATH qfbkin combout (291:291:291) (291:291:291))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE temp_data\[13\].lereg)
    (DELAY
      (ABSOLUTE
        (PORT datac (3955:3955:3955) (3955:3955:3955))
        (PORT aclr (668:668:668) (668:668:668))
        (PORT clk (2339:2339:2339) (2339:2339:2339))
        (IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
        (IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
      )
    )
    (TIMINGCHECK
      (SETUP datac (posedge clk) (10:10:10))
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datac (posedge clk) (100:100:100))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE data\[14\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1295:1295:1295) (1295:1295:1295))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE temp_data\[14\].lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (4073:4073:4073) (4073:4073:4073))
        (PORT datad (4624:4624:4624) (4624:4624:4624))
        (IOPATH datad combout (87:87:87) (87:87:87))
        (IOPATH qfbkin combout (291:291:291) (291:291:291))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE temp_data\[14\].lereg)
    (DELAY
      (ABSOLUTE
        (PORT datac (4163:4163:4163) (4163:4163:4163))
        (PORT aclr (668:668:668) (668:668:668))
        (PORT clk (2339:2339:2339) (2339:2339:2339))
        (IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
        (IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
      )
    )
    (TIMINGCHECK
      (SETUP datac (posedge clk) (10:10:10))
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datac (posedge clk) (100:100:100))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE data\[15\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1295:1295:1295) (1295:1295:1295))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE temp_data\[15\].lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (4079:4079:4079) (4079:4079:4079))
        (PORT datad (4624:4624:4624) (4624:4624:4624))
        (IOPATH datad combout (87:87:87) (87:87:87))
        (IOPATH qfbkin combout (291:291:291) (291:291:291))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE temp_data\[15\].lereg)
    (DELAY
      (ABSOLUTE
        (PORT datac (4169:4169:4169) (4169:4169:4169))
        (PORT aclr (668:668:668) (668:668:668))
        (PORT clk (2339:2339:2339) (2339:2339:2339))
        (IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
        (IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
      )
    )
    (TIMINGCHECK
      (SETUP datac (posedge clk) (10:10:10))
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datac (posedge clk) (100:100:100))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE data\[16\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1295:1295:1295) (1295:1295:1295))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE temp_data\[16\].lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (3862:3862:3862) (3862:3862:3862))
        (PORT datad (4607:4607:4607) (4607:4607:4607))
        (IOPATH datad combout (87:87:87) (87:87:87))
        (IOPATH qfbkin combout (291:291:291) (291:291:291))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE temp_data\[16\].lereg)
    (DELAY
      (ABSOLUTE
        (PORT datac (3952:3952:3952) (3952:3952:3952))
        (PORT aclr (668:668:668) (668:668:668))
        (PORT clk (2339:2339:2339) (2339:2339:2339))
        (IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
        (IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
      )
    )
    (TIMINGCHECK
      (SETUP datac (posedge clk) (10:10:10))
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datac (posedge clk) (100:100:100))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE data\[17\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1295:1295:1295) (1295:1295:1295))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE temp_data\[17\].lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (4060:4060:4060) (4060:4060:4060))
        (PORT datad (4620:4620:4620) (4620:4620:4620))
        (IOPATH datad combout (87:87:87) (87:87:87))
        (IOPATH qfbkin combout (291:291:291) (291:291:291))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE temp_data\[17\].lereg)
    (DELAY
      (ABSOLUTE
        (PORT datac (4150:4150:4150) (4150:4150:4150))
        (PORT aclr (668:668:668) (668:668:668))
        (PORT clk (2339:2339:2339) (2339:2339:2339))
        (IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
        (IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
      )
    )
    (TIMINGCHECK
      (SETUP datac (posedge clk) (10:10:10))
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datac (posedge clk) (100:100:100))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE data\[18\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1295:1295:1295) (1295:1295:1295))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE temp_data\[18\].lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (4094:4094:4094) (4094:4094:4094))
        (PORT datad (4617:4617:4617) (4617:4617:4617))
        (IOPATH datad combout (87:87:87) (87:87:87))
        (IOPATH qfbkin combout (291:291:291) (291:291:291))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE temp_data\[18\].lereg)
    (DELAY
      (ABSOLUTE
        (PORT datac (4184:4184:4184) (4184:4184:4184))
        (PORT aclr (668:668:668) (668:668:668))
        (PORT clk (2339:2339:2339) (2339:2339:2339))
        (IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
        (IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
      )
    )
    (TIMINGCHECK
      (SETUP datac (posedge clk) (10:10:10))
      (SETUP datain (posedge clk) (10:10:10))
      (HOLD datac (posedge clk) (100:100:100))
      (HOLD datain (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE data\[19\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1295:1295:1295) (1295:1295:1295))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE temp_data\[19\].lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (4067:4067:4067) (4067:4067:4067))
        (PORT datad (4610:4610:4610) (4610:4610:4610))
        (IOPATH datad combout (87:87:87) (87:87:87))
💿 文件大小 266 K
👤 上传用户 zl357159
📂 所属分类 VHDL/FPGA/Verilog
🏷️ 相关标签

#VerilogHDL #ram #程序
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