📄 ram_v.sdo
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// Copyright (C) 1991-2007 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions
// and other software and tools, and its AMPP partner logic
// functions, and any output files from any of the foregoing
// (including device programming or simulation files), and any
// associated documentation or information are expressly subject
// to the terms and conditions of the Altera Program License
// Subscription Agreement, Altera MegaCore Function License
// Agreement, or other applicable license agreement, including,
// without limitation, that your use is for the sole purpose of
// programming logic devices manufactured by Altera and sold by
// Altera or its authorized distributors. Please refer to the
// applicable agreement for further details.
//
// Device: Altera EP1S10F780C6 Package FBGA780
//
//
// This SDF file should be used for ModelSim-Altera (Verilog) only
//
(DELAYFILE
(SDFVERSION "2.1")
(DESIGN "RAM")
(DATE "12/12/2008 23:04:53")
(VENDOR "Altera")
(PROGRAM "Quartus II")
(VERSION "Version 7.2 Build 151 09/26/2007 SJ Full Version")
(DIVIDER .)
(TIMESCALE 1 ps)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE clk\~I.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (868:868:868) (868:868:868))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE data\[0\]\~I.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1141:1141:1141) (1141:1141:1141))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE en\~I.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1141:1141:1141) (1141:1141:1141))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_lcell")
(INSTANCE temp_data\[0\].lecomb)
(DELAY
(ABSOLUTE
(PORT datac (4997:4997:4997) (4997:4997:4997))
(PORT datad (4928:4928:4928) (4928:4928:4928))
(IOPATH datad combout (87:87:87) (87:87:87))
(IOPATH qfbkin combout (291:291:291) (291:291:291))
)
)
)
(CELL
(CELLTYPE "stratix_lcell_register")
(INSTANCE temp_data\[0\].lereg)
(DELAY
(ABSOLUTE
(PORT datac (5087:5087:5087) (5087:5087:5087))
(PORT aclr (668:668:668) (668:668:668))
(PORT clk (2334:2334:2334) (2334:2334:2334))
(IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
(IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
)
)
(TIMINGCHECK
(SETUP datac (posedge clk) (10:10:10))
(SETUP datain (posedge clk) (10:10:10))
(HOLD datac (posedge clk) (100:100:100))
(HOLD datain (posedge clk) (100:100:100))
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE data\[1\]\~I.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1295:1295:1295) (1295:1295:1295))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_lcell")
(INSTANCE temp_data\[1\].lecomb)
(DELAY
(ABSOLUTE
(PORT datac (4646:4646:4646) (4646:4646:4646))
(PORT datad (4924:4924:4924) (4924:4924:4924))
(IOPATH datad combout (87:87:87) (87:87:87))
(IOPATH qfbkin combout (291:291:291) (291:291:291))
)
)
)
(CELL
(CELLTYPE "stratix_lcell_register")
(INSTANCE temp_data\[1\].lereg)
(DELAY
(ABSOLUTE
(PORT datac (4736:4736:4736) (4736:4736:4736))
(PORT aclr (668:668:668) (668:668:668))
(PORT clk (2334:2334:2334) (2334:2334:2334))
(IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
(IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
)
)
(TIMINGCHECK
(SETUP datac (posedge clk) (10:10:10))
(SETUP datain (posedge clk) (10:10:10))
(HOLD datac (posedge clk) (100:100:100))
(HOLD datain (posedge clk) (100:100:100))
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE data\[2\]\~I.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1141:1141:1141) (1141:1141:1141))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_lcell")
(INSTANCE temp_data\[2\].lecomb)
(DELAY
(ABSOLUTE
(PORT datac (4614:4614:4614) (4614:4614:4614))
(PORT datad (4920:4920:4920) (4920:4920:4920))
(IOPATH datad combout (87:87:87) (87:87:87))
(IOPATH qfbkin combout (291:291:291) (291:291:291))
)
)
)
(CELL
(CELLTYPE "stratix_lcell_register")
(INSTANCE temp_data\[2\].lereg)
(DELAY
(ABSOLUTE
(PORT datac (4704:4704:4704) (4704:4704:4704))
(PORT aclr (668:668:668) (668:668:668))
(PORT clk (2334:2334:2334) (2334:2334:2334))
(IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
(IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
)
)
(TIMINGCHECK
(SETUP datac (posedge clk) (10:10:10))
(SETUP datain (posedge clk) (10:10:10))
(HOLD datac (posedge clk) (100:100:100))
(HOLD datain (posedge clk) (100:100:100))
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE data\[3\]\~I.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1295:1295:1295) (1295:1295:1295))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_lcell")
(INSTANCE temp_data\[3\].lecomb)
(DELAY
(ABSOLUTE
(PORT datac (4344:4344:4344) (4344:4344:4344))
(PORT datad (4937:4937:4937) (4937:4937:4937))
(IOPATH datad combout (87:87:87) (87:87:87))
(IOPATH qfbkin combout (291:291:291) (291:291:291))
)
)
)
(CELL
(CELLTYPE "stratix_lcell_register")
(INSTANCE temp_data\[3\].lereg)
(DELAY
(ABSOLUTE
(PORT datac (4434:4434:4434) (4434:4434:4434))
(PORT aclr (668:668:668) (668:668:668))
(PORT clk (2334:2334:2334) (2334:2334:2334))
(IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
(IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
)
)
(TIMINGCHECK
(SETUP datac (posedge clk) (10:10:10))
(SETUP datain (posedge clk) (10:10:10))
(HOLD datac (posedge clk) (100:100:100))
(HOLD datain (posedge clk) (100:100:100))
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE data\[4\]\~I.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1141:1141:1141) (1141:1141:1141))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_lcell")
(INSTANCE temp_data\[4\].lecomb)
(DELAY
(ABSOLUTE
(PORT datac (4561:4561:4561) (4561:4561:4561))
(PORT datad (4937:4937:4937) (4937:4937:4937))
(IOPATH datad combout (87:87:87) (87:87:87))
(IOPATH qfbkin combout (291:291:291) (291:291:291))
)
)
)
(CELL
(CELLTYPE "stratix_lcell_register")
(INSTANCE temp_data\[4\].lereg)
(DELAY
(ABSOLUTE
(PORT datac (4651:4651:4651) (4651:4651:4651))
(PORT aclr (668:668:668) (668:668:668))
(PORT clk (2334:2334:2334) (2334:2334:2334))
(IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
(IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
)
)
(TIMINGCHECK
(SETUP datac (posedge clk) (10:10:10))
(SETUP datain (posedge clk) (10:10:10))
(HOLD datac (posedge clk) (100:100:100))
(HOLD datain (posedge clk) (100:100:100))
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE data\[5\]\~I.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1141:1141:1141) (1141:1141:1141))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_lcell")
(INSTANCE temp_data\[5\].lecomb)
(DELAY
(ABSOLUTE
(PORT datac (4589:4589:4589) (4589:4589:4589))
(PORT datad (4936:4936:4936) (4936:4936:4936))
(IOPATH datad combout (87:87:87) (87:87:87))
(IOPATH qfbkin combout (291:291:291) (291:291:291))
)
)
)
(CELL
(CELLTYPE "stratix_lcell_register")
(INSTANCE temp_data\[5\].lereg)
(DELAY
(ABSOLUTE
(PORT datac (4679:4679:4679) (4679:4679:4679))
(PORT aclr (668:668:668) (668:668:668))
(PORT clk (2334:2334:2334) (2334:2334:2334))
(IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
(IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
)
)
(TIMINGCHECK
(SETUP datac (posedge clk) (10:10:10))
(SETUP datain (posedge clk) (10:10:10))
(HOLD datac (posedge clk) (100:100:100))
(HOLD datain (posedge clk) (100:100:100))
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE data\[6\]\~I.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1141:1141:1141) (1141:1141:1141))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_lcell")
(INSTANCE temp_data\[6\].lecomb)
(DELAY
(ABSOLUTE
(PORT datac (4987:4987:4987) (4987:4987:4987))
(PORT datad (4934:4934:4934) (4934:4934:4934))
(IOPATH datad combout (87:87:87) (87:87:87))
(IOPATH qfbkin combout (291:291:291) (291:291:291))
)
)
)
(CELL
(CELLTYPE "stratix_lcell_register")
(INSTANCE temp_data\[6\].lereg)
(DELAY
(ABSOLUTE
(PORT datac (5077:5077:5077) (5077:5077:5077))
(PORT aclr (668:668:668) (668:668:668))
(PORT clk (2334:2334:2334) (2334:2334:2334))
(IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
(IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
)
)
(TIMINGCHECK
(SETUP datac (posedge clk) (10:10:10))
(SETUP datain (posedge clk) (10:10:10))
(HOLD datac (posedge clk) (100:100:100))
(HOLD datain (posedge clk) (100:100:100))
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE data\[7\]\~I.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1141:1141:1141) (1141:1141:1141))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_lcell")
(INSTANCE temp_data\[7\].lecomb)
(DELAY
(ABSOLUTE
(PORT datac (4828:4828:4828) (4828:4828:4828))
(PORT datad (4934:4934:4934) (4934:4934:4934))
(IOPATH datad combout (87:87:87) (87:87:87))
(IOPATH qfbkin combout (291:291:291) (291:291:291))
)
)
)
(CELL
(CELLTYPE "stratix_lcell_register")
(INSTANCE temp_data\[7\].lereg)
(DELAY
(ABSOLUTE
(PORT datac (4918:4918:4918) (4918:4918:4918))
(PORT aclr (668:668:668) (668:668:668))
(PORT clk (2334:2334:2334) (2334:2334:2334))
(IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
(IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
)
)
(TIMINGCHECK
(SETUP datac (posedge clk) (10:10:10))
(SETUP datain (posedge clk) (10:10:10))
(HOLD datac (posedge clk) (100:100:100))
(HOLD datain (posedge clk) (100:100:100))
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE data\[8\]\~I.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1141:1141:1141) (1141:1141:1141))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_lcell")
(INSTANCE temp_data\[8\].lecomb)
(DELAY
(ABSOLUTE
(PORT datac (4304:4304:4304) (4304:4304:4304))
(PORT datad (4917:4917:4917) (4917:4917:4917))
(IOPATH datad combout (87:87:87) (87:87:87))
(IOPATH qfbkin combout (291:291:291) (291:291:291))
)
)
)
(CELL
(CELLTYPE "stratix_lcell_register")
(INSTANCE temp_data\[8\].lereg)
(DELAY
(ABSOLUTE
(PORT datac (4394:4394:4394) (4394:4394:4394))
(PORT aclr (668:668:668) (668:668:668))
(PORT clk (2334:2334:2334) (2334:2334:2334))
(IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
(IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
)
)
(TIMINGCHECK
(SETUP datac (posedge clk) (10:10:10))
(SETUP datain (posedge clk) (10:10:10))
(HOLD datac (posedge clk) (100:100:100))
(HOLD datain (posedge clk) (100:100:100))
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE data\[9\]\~I.inst1)
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