📄 connect.srr
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Starting point: dpram.ad_temp[0] / Q
Ending point: dpram.ad_temp[9] / D
The start point is clocked by connect|inclk [rising] on pin CLK
The end point is clocked by connect|inclk [rising] on pin CLK
Instance / Net Pin Pin Arrival No. of
Name Type Name Dir Delay Time Fan Out(s)
--------------------------------------------------------------------------------------------
dpram.ad_temp[0] DFFC Q Out 0.200 0.200 -
ad_temp[0] Net - - 4.380 - 12
dpram.ad_temp_0_sqmuxa_10 NAND3 B In - 4.580 -
dpram.ad_temp_0_sqmuxa_10 NAND3 Y Out 0.148 4.728 -
ad_temp_0_sqmuxa_10_i Net - - 0.630 - 1
dpram.ad_temp_0_sqmuxa OR3 B In - 5.358 -
dpram.ad_temp_0_sqmuxa OR3 Y Out 0.184 5.542 -
ad_temp_0_sqmuxa_i_0 Net - - 2.990 - 7
dpram.G_1_0 NAND2 A In - 8.532 -
dpram.G_1_0 NAND2 Y Out 0.140 8.672 -
G_1_0_0 Net - - 4.980 - 15
dpram.un1_ad_temp_2.G_2_2 NAND3FTT B In - 13.652 -
dpram.un1_ad_temp_2.G_2_2 NAND3FTT Y Out 0.148 13.800 -
G_2_2 Net - - 0.630 - 1
dpram.un1_ad_temp_2.G_1_7 XOR2 A In - 14.430 -
dpram.un1_ad_temp_2.G_1_7 XOR2 Y Out 0.148 14.578 -
un1_ad_temp_2_i_i_0_i[10] Net - - 0.630 - 1
dpram.G_1_1 AND2FT A In - 15.208 -
dpram.G_1_1 AND2FT Y Out 0.140 15.348 -
ad_temp_6[9] Net - - 0.630 - 1
dpram.ad_temp[9] DFFC D In - 15.978 -
============================================================================================
Total path delay (propagation time + setup) of 16.226 is 1.356(8.4%) logic and 14.870(91.6%) route.
Path information for path number 4:
Requested Period: 10.000
- Setup time: 0.248
= Required time: 9.752
- Propagation time: 15.948
= Slack (non-critical) : -6.195
Number of logic level(s): 8
Starting point: dpram.ad_temp[12] / Q
Ending point: dpram.ad_temp[10] / D
The start point is clocked by connect|inclk [rising] on pin CLK
The end point is clocked by connect|inclk [rising] on pin CLK
Instance / Net Pin Pin Arrival No. of
Name Type Name Dir Delay Time Fan Out(s)
----------------------------------------------------------------------------------------------
dpram.ad_temp[12] DFFC Q Out 0.160 0.160 -
ad_temp[12] Net - - 2.660 - 6
dpram.G_1_4 OR2 A In - 2.820 -
dpram.G_1_4 OR2 Y Out 0.108 2.928 -
un9_ad_temp_7_i_i Net - - 1.060 - 2
dpram.ad_temp_0_sqmuxa_9 OR3 A In - 3.988 -
dpram.ad_temp_0_sqmuxa_9 OR3 Y Out 0.104 4.092 -
ad_temp_0_sqmuxa_9_i Net - - 0.630 - 1
dpram.ad_temp_0_sqmuxa_12 OR3 A In - 4.722 -
dpram.ad_temp_0_sqmuxa_12 OR3 Y Out 0.104 4.826 -
ad_temp_0_sqmuxa_12_i Net - - 0.630 - 1
dpram.ad_temp_0_sqmuxa OR3 A In - 5.456 -
dpram.ad_temp_0_sqmuxa OR3 Y Out 0.104 5.560 -
ad_temp_0_sqmuxa_i_0 Net - - 2.990 - 7
dpram.G_1_0 NAND2 A In - 8.550 -
dpram.G_1_0 NAND2 Y Out 0.140 8.690 -
G_1_0_0 Net - - 4.980 - 15
dpram.un1_ad_temp_2.G_1_0 AND3 A In - 13.670 -
dpram.un1_ad_temp_2.G_1_0 AND3 Y Out 0.056 13.726 -
DWACT_ADD_CI_0_g_array_11_1[0] Net - - 0.630 - 1
dpram.un1_ad_temp_2.I_51 XOR2 B In - 14.356 -
dpram.un1_ad_temp_2.I_51 XOR2 Y Out 0.152 14.508 -
I_51 Net - - 0.630 - 1
dpram.ad_temp_6[10] AND2 B In - 15.138 -
dpram.ad_temp_6[10] AND2 Y Out 0.180 15.318 -
ad_temp_6[10] Net - - 0.630 - 1
dpram.ad_temp[10] DFFC D In - 15.948 -
==============================================================================================
Total path delay (propagation time + setup) of 16.195 is 1.355(8.4%) logic and 14.840(91.6%) route.
Path information for path number 5:
Requested Period: 10.000
- Setup time: 0.248
= Required time: 9.752
- Propagation time: 15.948
= Slack (non-critical) : -6.195
Number of logic level(s): 8
Starting point: dpram.ad_temp[12] / Q
Ending point: dpram.ad_temp[4] / D
The start point is clocked by connect|inclk [rising] on pin CLK
The end point is clocked by connect|inclk [rising] on pin CLK
Instance / Net Pin Pin Arrival No. of
Name Type Name Dir Delay Time Fan Out(s)
-------------------------------------------------------------------------------------------
dpram.ad_temp[12] DFFC Q Out 0.160 0.160 -
ad_temp[12] Net - - 2.660 - 6
dpram.G_1_4 OR2 A In - 2.820 -
dpram.G_1_4 OR2 Y Out 0.108 2.928 -
un9_ad_temp_7_i_i Net - - 1.060 - 2
dpram.ad_temp_0_sqmuxa_9 OR3 A In - 3.988 -
dpram.ad_temp_0_sqmuxa_9 OR3 Y Out 0.104 4.092 -
ad_temp_0_sqmuxa_9_i Net - - 0.630 - 1
dpram.ad_temp_0_sqmuxa_12 OR3 A In - 4.722 -
dpram.ad_temp_0_sqmuxa_12 OR3 Y Out 0.104 4.826 -
ad_temp_0_sqmuxa_12_i Net - - 0.630 - 1
dpram.ad_temp_0_sqmuxa OR3 A In - 5.456 -
dpram.ad_temp_0_sqmuxa OR3 Y Out 0.104 5.560 -
ad_temp_0_sqmuxa_i_0 Net - - 2.990 - 7
dpram.G_1_0 NAND2 A In - 8.550 -
dpram.G_1_0 NAND2 Y Out 0.140 8.690 -
G_1_0_0 Net - - 4.980 - 15
dpram.un1_ad_temp_2.G_2_0 AND3 A In - 13.670 -
dpram.un1_ad_temp_2.G_2_0 AND3 Y Out 0.056 13.726 -
DWACT_ADD_CI_0_g_array_2[0] Net - - 0.630 - 1
dpram.un1_ad_temp_2.I_53 XOR2 B In - 14.356 -
dpram.un1_ad_temp_2.I_53 XOR2 Y Out 0.152 14.508 -
I_53 Net - - 0.630 - 1
dpram.ad_temp_6[4] AND2 B In - 15.138 -
dpram.ad_temp_6[4] AND2 Y Out 0.180 15.318 -
ad_temp_6[4] Net - - 0.630 - 1
dpram.ad_temp[4] DFFC D In - 15.948 -
===========================================================================================
Total path delay (propagation time + setup) of 16.195 is 1.355(8.4%) logic and 14.840(91.6%) route.
##### END OF TIMING REPORT #####]
--------------------------------------------------------------------------------
Report for cell connect.one
Cell usage:
cell count area count*area
DFFC 226 1.0 226.0
MUX2H 199 1.0 199.0
OB33PH 58 0.0 0.0
AND2 48 1.0 48.0
XOR2 35 1.0 35.0
INV 25 1.0 25.0
AND3 23 1.0 23.0
OR2 22 1.0 22.0
IB33 13 0.0 0.0
AND2FT 12 1.0 12.0
OR3 11 1.0 11.0
NAND3 10 1.0 10.0
NOR2 9 1.0 9.0
NOR2FT 8 1.0 8.0
DFFS 7 1.0 7.0
NAND3FFT 6 1.0 6.0
NAND2FT 5 1.0 5.0
NAND2 5 1.0 5.0
NAND3FTT 4 1.0 4.0
XOR2FT 4 1.0 4.0
GND 3 0.0 0.0
PWR 3 0.0 0.0
OR2FT 3 1.0 3.0
NOR3 2 1.0 2.0
AO21 2 1.0 2.0
AO21FTT 2 1.0 2.0
AND3FFT 2 1.0 2.0
AO21TTF 2 1.0 2.0
BFR 1 1.0 1.0
OA21FTF 1 1.0 1.0
GL33 1 0.0 0.0
OA21FTT 1 1.0 1.0
AOI21 1 1.0 1.0
OA21TTF 1 1.0 1.0
OA21 1 1.0 1.0
NOR3FFT 1 1.0 1.0
OAI21FTF 1 1.0 1.0
NOR3FTT 1 1.0 1.0
OR3FTT 1 1.0 1.0
----- ----------
TOTAL 760 682.0
Mapper successful!
Process took 0h:0m:3s realtime, 0h:0m:3s cputime
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