📄 connect.srr
字号:
Clock Relationships
*******************
Clocks | rise to rise | fall to fall | rise to fall | fall to rise
---------------------------------------------------------------------------------------------------------------------
Starting Ending | constraint slack | constraint slack | constraint slack | constraint slack
---------------------------------------------------------------------------------------------------------------------
connect|inclk connect|inclk | 10.000 -6.300 | No paths - | No paths - | No paths -
=====================================================================================================================
Note: 'No paths' indicates there are no paths in the design for that pair of clock edges.
'Diff grp' indicates that paths exist but the starting clock and ending clock are in different clock groups.
Interface Information
*********************
No IO constraint found
====================================
Detailed Report for Clock: connect|inclk
====================================
Starting Points with Worst Slack
********************************
Starting Arrival
Instance Reference Type Pin Net Time Slack
Clock
------------------------------------------------------------------------------------------------------
fiforr.data_count[0] connect|inclk DFFC Q data_count_i_0_i[0] 0.200 -6.300
dpram.ad_temp[12] connect|inclk DFFC Q ad_temp[12] 0.160 -6.244
dpram.ad_temp[0] connect|inclk DFFC Q ad_temp[0] 0.200 -6.226
dpram.ad_temp[1] connect|inclk DFFC Q ad_temp[1] 0.200 -6.004
fiforr.data_count[1] connect|inclk DFFC Q data_count[1] 0.200 -5.994
fiforr.data_temp[0] connect|inclk DFFC Q data_temp[0] 0.160 -5.981
dpram.ad_temp[13] connect|inclk DFFC Q ad_temp[13] 0.160 -5.954
fiforr.data_temp[7] connect|inclk DFFC Q data_temp[7] 0.200 -5.938
dpram.ad_temp[10] connect|inclk DFFC Q ad_temp[10] 0.200 -5.886
dpram.ad_temp[5] connect|inclk DFFC Q ad_temp[5] 0.200 -5.744
======================================================================================================
Ending Points with Worst Slack
******************************
Starting Required
Instance Reference Type Pin Net Time Slack
Clock
---------------------------------------------------------------------------------------------------
fiforr.data_count[7] connect|inclk DFFC D I_41 9.752 -6.300
dpram.ad_temp[9] connect|inclk DFFC D ad_temp_6[9] 9.752 -6.244
dpram.ad_temp[4] connect|inclk DFFC D ad_temp_6[4] 9.752 -6.235
dpram.ad_temp[10] connect|inclk DFFC D ad_temp_6[10] 9.752 -6.235
dpram.ad_temp[7] connect|inclk DFFC D ad_temp_6[7] 9.752 -6.195
dpram.ad_temp[11] connect|inclk DFFC D ad_temp_6[11] 9.752 -6.195
dpram.ad_temp[5] connect|inclk DFFC D ad_temp_6[5] 9.752 -6.183
fiforr.byte_count[7] connect|inclk DFFC D byte_count_6[7] 9.752 -5.981
fiforr.data_count[6] connect|inclk DFFC D I_44 9.752 -5.562
dpram.ad_temp[1] connect|inclk DFFC D I_56 9.752 -5.465
===================================================================================================
Worst Path Information
***********************
Path information for path number 1:
Requested Period: 10.000
- Setup time: 0.248
= Required time: 9.752
- Propagation time: 16.052
= Slack (critical) : -6.300
Number of logic level(s): 9
Starting point: fiforr.data_count[0] / Q
Ending point: fiforr.data_count[7] / D
The start point is clocked by connect|inclk [rising] on pin CLK
The end point is clocked by connect|inclk [rising] on pin CLK
Instance / Net Pin Pin Arrival No. of
Name Type Name Dir Delay Time Fan Out(s)
-------------------------------------------------------------------------------------------------
fiforr.data_count[0] DFFC Q Out 0.200 0.200 -
data_count_i_0_i[0] Net - - 3.320 - 8
fiforr.G_1_0 NOR2 B In - 3.520 -
fiforr.G_1_0 NOR2 Y Out 0.128 3.648 -
G_1_0 Net - - 1.060 - 2
fiforr.G_2_4 AND3FFT C In - 4.708 -
fiforr.G_2_4 AND3FFT Y Out 0.116 4.824 -
G_2_4 Net - - 0.630 - 1
fiforr.G_2 NAND3FTT B In - 5.454 -
fiforr.G_2 NAND3FTT Y Out 0.120 5.574 -
G_2_0 Net - - 1.900 - 4
fiforr.N_307_i INV A In - 7.474 -
fiforr.N_307_i INV Y Out 0.184 7.658 -
N_307_i Net - - 1.060 - 2
fiforr.G OR2 A In - 8.718 -
fiforr.G OR2 Y Out 0.108 8.826 -
G Net - - 2.990 - 7
fiforr.un1_data_count_2.G AND3 A In - 11.816 -
fiforr.un1_data_count_2.G AND3 Y Out 0.068 11.884 -
DWACT_ADD_CI_0_g_array_2[0] Net - - 1.480 - 3
fiforr.un1_data_count_2.I_68 AND2 A In - 13.364 -
fiforr.un1_data_count_2.I_68 AND2 Y Out 0.108 13.472 -
DWACT_ADD_CI_0_g_array_11[0] Net - - 1.060 - 2
fiforr.un1_data_count_2.I_55 AND2 A In - 14.532 -
fiforr.un1_data_count_2.I_55 AND2 Y Out 0.108 14.640 -
DWACT_ADD_CI_0_g_array_12_2[0] Net - - 0.630 - 1
fiforr.un1_data_count_2.I_41 XOR2 B In - 15.270 -
fiforr.un1_data_count_2.I_41 XOR2 Y Out 0.152 15.422 -
I_41 Net - - 0.630 - 1
fiforr.data_count[7] DFFC D In - 16.052 -
=================================================================================================
Total path delay (propagation time + setup) of 16.300 is 1.540(9.4%) logic and 14.760(90.6%) route.
Path information for path number 2:
Requested Period: 10.000
- Setup time: 0.248
= Required time: 9.752
- Propagation time: 15.996
= Slack (non-critical) : -6.244
Number of logic level(s): 8
Starting point: dpram.ad_temp[12] / Q
Ending point: dpram.ad_temp[9] / D
The start point is clocked by connect|inclk [rising] on pin CLK
The end point is clocked by connect|inclk [rising] on pin CLK
Instance / Net Pin Pin Arrival No. of
Name Type Name Dir Delay Time Fan Out(s)
--------------------------------------------------------------------------------------------
dpram.ad_temp[12] DFFC Q Out 0.160 0.160 -
ad_temp[12] Net - - 2.660 - 6
dpram.G_1_4 OR2 A In - 2.820 -
dpram.G_1_4 OR2 Y Out 0.108 2.928 -
un9_ad_temp_7_i_i Net - - 1.060 - 2
dpram.ad_temp_0_sqmuxa_9 OR3 A In - 3.988 -
dpram.ad_temp_0_sqmuxa_9 OR3 Y Out 0.104 4.092 -
ad_temp_0_sqmuxa_9_i Net - - 0.630 - 1
dpram.ad_temp_0_sqmuxa_12 OR3 A In - 4.722 -
dpram.ad_temp_0_sqmuxa_12 OR3 Y Out 0.104 4.826 -
ad_temp_0_sqmuxa_12_i Net - - 0.630 - 1
dpram.ad_temp_0_sqmuxa OR3 A In - 5.456 -
dpram.ad_temp_0_sqmuxa OR3 Y Out 0.104 5.560 -
ad_temp_0_sqmuxa_i_0 Net - - 2.990 - 7
dpram.G_1_0 NAND2 A In - 8.550 -
dpram.G_1_0 NAND2 Y Out 0.140 8.690 -
G_1_0_0 Net - - 4.980 - 15
dpram.un1_ad_temp_2.G_2_2 NAND3FTT B In - 13.670 -
dpram.un1_ad_temp_2.G_2_2 NAND3FTT Y Out 0.148 13.818 -
G_2_2 Net - - 0.630 - 1
dpram.un1_ad_temp_2.G_1_7 XOR2 A In - 14.448 -
dpram.un1_ad_temp_2.G_1_7 XOR2 Y Out 0.148 14.596 -
un1_ad_temp_2_i_i_0_i[10] Net - - 0.630 - 1
dpram.G_1_1 AND2FT A In - 15.226 -
dpram.G_1_1 AND2FT Y Out 0.140 15.366 -
ad_temp_6[9] Net - - 0.630 - 1
dpram.ad_temp[9] DFFC D In - 15.996 -
============================================================================================
Total path delay (propagation time + setup) of 16.244 is 1.404(8.6%) logic and 14.840(91.4%) route.
Path information for path number 3:
Requested Period: 10.000
- Setup time: 0.248
= Required time: 9.752
- Propagation time: 15.978
= Slack (non-critical) : -6.226
Number of logic level(s): 6
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -