watch.map.summary

来自「运用VHDL语言编写的秒表程序」· SUMMARY 代码 · 共 9 行

Analysis & Synthesis Status : Successful - Tue May 20 16:48:30 2008
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : watch
Top-level Entity Name : watch
Family : FLEX10K
Total logic elements : 141
Total pins : 18
Total memory bits : 0