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📄 watch.drc.rpt

📁 运用VHDL语言编写的秒表程序
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; External reset should be synchronized using two cascaded registers (R102) ; reset     ;
+---------------------------------------------------------------------------+-----------+


+--------------------------------------------------------------------------------------------------------------+
; Information only Violations                                                                                  ;
+---------------------------------------+------------------------------------------------------------+---------+
; Rule name                             ; Name                                                       ; Fan-Out ;
+---------------------------------------+------------------------------------------------------------+---------+
; Top nodes with highest fan-out (T102) ; cp1                                                        ; 25      ;
; Top nodes with highest fan-out (T102) ; reset                                                      ; 24      ;
; Top nodes with highest fan-out (T102) ; cp2                                                        ; 23      ;
; Top nodes with highest fan-out (T102) ; numlet[0]                                                  ; 21      ;
; Top nodes with highest fan-out (T102) ; numlet[2]                                                  ; 17      ;
; Top nodes with highest fan-out (T102) ; count[10]                                                  ; 16      ;
; Top nodes with highest fan-out (T102) ; num[3]                                                     ; 15      ;
; Top nodes with highest fan-out (T102) ; num[2]                                                     ; 15      ;
; Top nodes with highest fan-out (T102) ; num[1]                                                     ; 15      ;
; Top nodes with highest fan-out (T102) ; num[0]                                                     ; 15      ;
; Top nodes with highest fan-out (T102) ; numlet[1]                                                  ; 13      ;
; Top nodes with highest fan-out (T102) ; Equal1~29                                                  ; 8       ;
; Top nodes with highest fan-out (T102) ; Equal0~207                                                 ; 7       ;
; Top nodes with highest fan-out (T102) ; Equal2~31                                                  ; 6       ;
; Top nodes with highest fan-out (T102) ; num5[0]                                                    ; 6       ;
; Top nodes with highest fan-out (T102) ; num3[0]                                                    ; 6       ;
; Top nodes with highest fan-out (T102) ; _~1                                                        ; 5       ;
; Top nodes with highest fan-out (T102) ; _~0                                                        ; 5       ;
; Top nodes with highest fan-out (T102) ; num6[0]                                                    ; 5       ;
; Top nodes with highest fan-out (T102) ; beginstop1                                                 ; 5       ;
; Top nodes with highest fan-out (T102) ; num4[0]                                                    ; 5       ;
; Top nodes with highest fan-out (T102) ; num3[1]                                                    ; 5       ;
; Top nodes with highest fan-out (T102) ; num5[1]                                                    ; 5       ;
; Top nodes with highest fan-out (T102) ; num6[2]                                                    ; 4       ;
; Top nodes with highest fan-out (T102) ; num6[0]~4                                                  ; 4       ;
; Top nodes with highest fan-out (T102) ; num4[1]                                                    ; 4       ;
; Top nodes with highest fan-out (T102) ; Equal2~31$wirecell                                         ; 4       ;
; Top nodes with highest fan-out (T102) ; num4[2]                                                    ; 4       ;
; Top nodes with highest fan-out (T102) ; num3[2]                                                    ; 4       ;
; Top nodes with highest fan-out (T102) ; num5[2]                                                    ; 4       ;
; Top nodes with highest fan-out (T102) ; num6[1]                                                    ; 4       ;
; Top nodes with highest fan-out (T102) ; Equal4~29                                                  ; 3       ;
; Top nodes with highest fan-out (T102) ; num3[3]                                                    ; 3       ;
; Top nodes with highest fan-out (T102) ; num5[3]                                                    ; 3       ;
; Top nodes with highest fan-out (T102) ; num6[3]                                                    ; 3       ;
; Top nodes with highest fan-out (T102) ; num4[3]                                                    ; 3       ;
; Top nodes with highest fan-out (T102) ; count[21]                                                  ; 2       ;
; Top nodes with highest fan-out (T102) ; lpm_counter:num1_rtl_0|alt_counter_f10ke:wysi_counter|q[3] ; 2       ;
; Top nodes with highest fan-out (T102) ; count[20]                                                  ; 2       ;
; Top nodes with highest fan-out (T102) ; count[6]                                                   ; 2       ;
; Top nodes with highest fan-out (T102) ; count[19]                                                  ; 2       ;
; Top nodes with highest fan-out (T102) ; count[18]                                                  ; 2       ;
; Top nodes with highest fan-out (T102) ; count[15]                                                  ; 2       ;
; Top nodes with highest fan-out (T102) ; count[17]                                                  ; 2       ;
; Top nodes with highest fan-out (T102) ; selsig[1]                                                  ; 2       ;
; Top nodes with highest fan-out (T102) ; count[16]                                                  ; 2       ;
; Top nodes with highest fan-out (T102) ; count[4]                                                   ; 2       ;
; Top nodes with highest fan-out (T102) ; selsig[2]                                                  ; 2       ;
; Top nodes with highest fan-out (T102) ; count[12]                                                  ; 2       ;
; Top nodes with highest fan-out (T102) ; count[3]                                                   ; 2       ;
+---------------------------------------+------------------------------------------------------------+---------+


+---------------------------+
; Design Assistant Messages ;
+---------------------------+
Info: *******************************************************************
Info: Running Quartus II Design Assistant
    Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
    Info: Processing started: Tue May 20 16:49:27 2008
Info: Command: quartus_drc --read_settings_files=on --write_settings_files=off watch -c watch
Info: Selected device EPF10K10LC84-4 for design "watch"
Critical Warning: Design Assistant warning: Design should not contain combinational loops (A101). Found 7 combinational loop(s) related to this rule.
    Critical Warning: Combinational loop 1 contains 1 node(s)
        Critical Warning: Node  "segsig[0]"
    Critical Warning: Combinational loop 2 contains 1 node(s)
        Critical Warning: Node  "segsig[1]"
    Critical Warning: Combinational loop 3 contains 1 node(s)
        Critical Warning: Node  "segsig[2]"
    Critical Warning: Combinational loop 4 contains 1 node(s)
        Critical Warning: Node  "segsig[3]"
    Critical Warning: Combinational loop 5 contains 1 node(s)
        Critical Warning: Node  "segsig[4]"
    Critical Warning: Combinational loop 6 contains 1 node(s)
        Critical Warning: Node  "segsig[5]"
    Critical Warning: Combinational loop 7 contains 1 node(s)
        Critical Warning: Node  "segsig[6]"
Critical Warning: Design Assistant warning: Data bits are not synchronized when transferred between asynchronous clock domains (D101). Found 1 asynchronous clock domain interface structure(s) related to this rule.
    Critical Warning: Structure 1 contains 5 node(s)
        Critical Warning: Node  "beginstop1"
        Critical Warning: Node  "lpm_counter:num1_rtl_0|alt_counter_f10ke:wysi_counter|q[3]"
        Critical Warning: Node  "lpm_counter:num1_rtl_0|alt_counter_f10ke:wysi_counter|q[0]"
        Critical Warning: Node  "lpm_counter:num1_rtl_0|alt_counter_f10ke:wysi_counter|q[2]"
        Critical Warning: Node  "lpm_counter:num1_rtl_0|alt_counter_f10ke:wysi_counter|q[1]"
Warning: Design Assistant warning: Clock signal source should drive only input clock ports (C104). Found 2 nodes related to this rule.
    Warning: Node  "count[10]"
    Warning: Node  "cp1"
Warning: Design Assistant warning: External reset should be synchronized using two cascaded registers (R102). Found 1 node(s) related to this rule.
    Warning: Node  "reset"
Info: Design Assistant information: Top nodes with highest fan-out (T102). Found 50 node(s) with highest fan-out.
    Info: Node "cp1" has 25 fan-out(s)
    Info: Node "reset" has 24 fan-out(s)
    Info: Node "cp2" has 23 fan-out(s)
    Info: Node "numlet[0]" has 21 fan-out(s)
    Info: Node "numlet[2]" has 17 fan-out(s)
    Info: Node "count[10]" has 16 fan-out(s)
    Info: Node "num[3]" has 15 fan-out(s)
    Info: Node "num[2]" has 15 fan-out(s)
    Info: Node "num[1]" has 15 fan-out(s)
    Info: Node "num[0]" has 15 fan-out(s)
    Info: Node "numlet[1]" has 13 fan-out(s)
    Info: Node "Equal1~29" has 8 fan-out(s)
    Info: Node "Equal0~207" has 7 fan-out(s)
    Info: Node "Equal2~31" has 6 fan-out(s)
    Info: Node "num5[0]" has 6 fan-out(s)
    Info: Node "num3[0]" has 6 fan-out(s)
    Info: Node "_~1" has 5 fan-out(s)
    Info: Node "_~0" has 5 fan-out(s)
    Info: Node "num6[0]" has 5 fan-out(s)
    Info: Node "beginstop1" has 5 fan-out(s)
    Info: Node "num4[0]" has 5 fan-out(s)
    Info: Node "num3[1]" has 5 fan-out(s)
    Info: Node "num5[1]" has 5 fan-out(s)
    Info: Node "num6[2]" has 4 fan-out(s)
    Info: Node "num6[0]~4" has 4 fan-out(s)
    Info: Node "num4[1]" has 4 fan-out(s)
    Info: Node "Equal2~31$wirecell" has 4 fan-out(s)
    Info: Node "num4[2]" has 4 fan-out(s)
    Info: Node "num3[2]" has 4 fan-out(s)
    Info: Node "num5[2]" has 4 fan-out(s)
    Info: Truncated list of Design Assistant messages to 30 messages. Go to sections under Design Assistant section of Compilation Report for complete lists of Design Assistant messages generated.
Info: Design Assistant information: finished post-synthesis analysis of current design -- generated 50 information messages and 11 warning messages
Info: Quartus II Design Assistant was successful. 0 errors, 27 warnings
    Info: Processing ended: Tue May 20 16:49:29 2008
    Info: Elapsed time: 00:00:03


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